core/pci: Support SRIOV VFs

Currently, skiboot can't see SRIOV VFs. It introduces some troubles
as I can see: The device initialization logic (phb->ops->device_init())
isn't applied to VFs, meaning we have to maintain same and duplicated
mechanism in kernel for VFs only. It introduces difficulty to code
maintaining and prone to lose sychronization.

This was motivated by bug reported by Carol: The VF's Max Payload
Size (MPS) isn't matched with PF's on Mellanox's adapter even kernel
tried to make them same. It's caused by readonly PCIECAP_EXP_DEVCTL
register on VFs. The skiboot would be best place to emulate this bits
to eliminate the gap as I can see.

This supports SRIOV VFs. When the PF's SRIOV capability is populated,
the number of maximal VFs (struct pci_device) are instanciated, but
but not usable yet. In the mean while, PCI config register filter is
registered against PCIECAP_SRIOV_CTRL_VFE to capture the event of
enabling or disabling VFs. The VFs are initialized, put into the PF's
children list (pd->children), populate its PCI capabilities, and
register PCI config register filter against PCICAP_EXP_DEVCTL. The
filter's handler caches what is written to MPS field and returns
the cached value on read, to eliminate the gap mentioned as above.

Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Reviewed-by: Russell Currey <ruscur@russell.cc>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>

1 files changed, 2 insertions, 0 deletions

diff --git a/core/pci.c b/core/pci.c
index 142a1a1..9889dbf 100644
--- a/core/pci.c
+++ b/core/pci.c
@@ -18,6 +18,7 @@
 #include <cpu.h>
 #include <pci.h>
 #include <pci-cfg.h>
+#include <pci-iov.h>
 #include <pci-slot.h>
 #include <timebase.h>
 #include <device.h>
@@ -204,6 +205,7 @@ void pci_init_capabilities(struct phb *phb, struct pci_device *pd)
 {
 	pci_init_pcie_cap(phb, pd);
 	pci_init_aer_cap(phb, pd);
+	pci_init_iov_cap(phb, pd);
 }
 
 static struct pci_device *pci_scan_one(struct phb *phb, struct pci_device *parent,