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| author | Gavin Shan <gwshan@linux.vnet.ibm.com> | 2017-02-10 12:20:01 +1100 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2017-02-16 16:50:54 +1100 |
| commit | 0247540839c42e554426eb7e9a5acefdbbba5a4d (patch) | |
| tree | 327c548ca9c9b90f950218151739059414eb01a7 /core/pci.c | |
| parent | b200ee0ccb1d00622ff0ba411aa97ee8104cab61 (diff) | |
| download | skiboot-0247540839c42e554426eb7e9a5acefdbbba5a4d.zip skiboot-0247540839c42e554426eb7e9a5acefdbbba5a4d.tar.gz skiboot-0247540839c42e554426eb7e9a5acefdbbba5a4d.tar.bz2 | |
hw/phb3: Apply config register filter after HW change
The PCI config register is applied before the HW register is changed.
It won't work when this mechanism is used to capture the change to
SRIOV capability in subsequent patch.
This moves the logic around so that the filter is applied after HW
register is changed. Currently, it's used to cache bridge's pref
window base/length. The code change shouldn't affect that. So no
functional changes introduced by this.
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Reviewed-by: Russell Currey <ruscur@russell.cc>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'core/pci.c')
0 files changed, 0 insertions, 0 deletions