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authorNicholas Piggin <npiggin@gmail.com>2017-09-20 16:56:03 +1000
committerStewart Smith <stewart@linux.vnet.ibm.com>2017-09-20 23:25:01 -0500
commit5e09fe1f19d3f56b1cebb44439da5b5de6e1fccd (patch)
tree159d5c1c26a8068df3ec6cc623f5db7e3bfa8310 /core/init.c
parent5779c11fdc57c4dc474beb00f044f34ec1c58368 (diff)
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core: POWER9 implement OPAL_SIGNAL_SYSTEM_RESET
This implements OPAL_SIGNAL_SYSTEM_RESET, using scom registers to quiesce the target thread and raise a system reset exception on it. It has been tested on DD2 with stop0 ESL=0 and ESL=1 shallow power saving modes. DD1 is not implemented because it is sufficiently different as to make support difficult. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> [stewart@linux.vnet.ibm.com: fixup hdat_to_dt test] Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'core/init.c')
-rw-r--r--core/init.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/core/init.c b/core/init.c
index 8951e17..ab260d4 100644
--- a/core/init.c
+++ b/core/init.c
@@ -881,6 +881,12 @@ void __noreturn __nomcount main_cpu_entry(const void *fdt)
mfsi_init();
/*
+ * Direct controls facilities provides some controls over CPUs
+ * using scoms.
+ */
+ direct_controls_init();
+
+ /*
* Put various bits & pieces in device-tree that might not
* already be there such as the /chosen node if not there yet,
* the ICS node, etc... This can potentially use XSCOM