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| author | Nicholas Piggin <npiggin@gmail.com> | 2017-11-29 15:36:55 +1000 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2017-12-03 21:49:12 -0600 |
| commit | 1e85912b921028bafa3a68fa286682a5d21a1223 (patch) | |
| tree | 4cb73db1388082a2f85cdd189f05cfd171601f78 /core/direct-controls.c | |
| parent | 44687f84e44311fed40cb8520664907221be8298 (diff) | |
| download | skiboot-1e85912b921028bafa3a68fa286682a5d21a1223.zip skiboot-1e85912b921028bafa3a68fa286682a5d21a1223.tar.gz skiboot-1e85912b921028bafa3a68fa286682a5d21a1223.tar.bz2 | |
direct-controls: add xscom error handling for p8
Add xscom checks which will print something useful and return error
back to callers (which already have error handling plumbed in).
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'core/direct-controls.c')
| -rw-r--r-- | core/direct-controls.c | 36 |
1 files changed, 27 insertions, 9 deletions
diff --git a/core/direct-controls.c b/core/direct-controls.c index 7e0aea3..486d2e8 100644 --- a/core/direct-controls.c +++ b/core/direct-controls.c @@ -202,7 +202,7 @@ static int p8_core_clear_special_wakeup(struct cpu_thread *cpu) return 0; } -static void p8_set_direct_ctl(struct cpu_thread *cpu, uint64_t bits) +static int p8_stop_thread(struct cpu_thread *cpu) { uint32_t core_id = pir_to_core_id(cpu->pir); uint32_t chip_id = pir_to_chip_id(cpu->pir); @@ -212,20 +212,38 @@ static void p8_set_direct_ctl(struct cpu_thread *cpu, uint64_t bits) xscom_addr = XSCOM_ADDR_P8_EX(core_id, P8_EX_TCTL_DIRECT_CONTROLS(thread_id)); - xscom_write(chip_id, xscom_addr, bits); -} - -static int p8_stop_thread(struct cpu_thread *cpu) -{ - p8_set_direct_ctl(cpu, P8_DIRECT_CTL_STOP); + if (xscom_write(chip_id, xscom_addr, P8_DIRECT_CTL_STOP)) { + prlog(PR_ERR, "Could not stop thread %u:%u:%u:" + " Unable to write EX_TCTL_DIRECT_CONTROLS.\n", + chip_id, core_id, thread_id); + return OPAL_HARDWARE; + } return OPAL_SUCCESS; } static int p8_sreset_thread(struct cpu_thread *cpu) { - p8_set_direct_ctl(cpu, P8_DIRECT_CTL_PRENAP); - p8_set_direct_ctl(cpu, P8_DIRECT_CTL_SRESET); + uint32_t core_id = pir_to_core_id(cpu->pir); + uint32_t chip_id = pir_to_chip_id(cpu->pir); + uint32_t thread_id = pir_to_thread_id(cpu->pir); + uint32_t xscom_addr; + + xscom_addr = XSCOM_ADDR_P8_EX(core_id, + P8_EX_TCTL_DIRECT_CONTROLS(thread_id)); + + if (xscom_write(chip_id, xscom_addr, P8_DIRECT_CTL_PRENAP)) { + prlog(PR_ERR, "Could not prenap thread %u:%u:%u:" + " Unable to write EX_TCTL_DIRECT_CONTROLS.\n", + chip_id, core_id, thread_id); + return OPAL_HARDWARE; + } + if (xscom_write(chip_id, xscom_addr, P8_DIRECT_CTL_SRESET)) { + prlog(PR_ERR, "Could not sreset thread %u:%u:%u:" + " Unable to write EX_TCTL_DIRECT_CONTROLS.\n", + chip_id, core_id, thread_id); + return OPAL_HARDWARE; + } return OPAL_SUCCESS; } |