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| author | Nicholas Piggin <npiggin@gmail.com> | 2019-01-16 13:58:40 +1000 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.ibm.com> | 2019-01-25 13:57:05 -0600 |
| commit | 0b0d15e3c1701fd98bc72b69ae9ba43699aef68d (patch) | |
| tree | b9ae3aeef9e17ae29b70744bf1d5564c59bc5f6e /core/cpu.c | |
| parent | 3b4ae3a2e2a56e1166be9176445fe7fcdee1fca2 (diff) | |
| download | skiboot-0b0d15e3c1701fd98bc72b69ae9ba43699aef68d.zip skiboot-0b0d15e3c1701fd98bc72b69ae9ba43699aef68d.tar.gz skiboot-0b0d15e3c1701fd98bc72b69ae9ba43699aef68d.tar.bz2 | |
Remove POWER9N DD1 support
This is not a shipping product and is no longer supported by Linux
or other firmware components.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
Diffstat (limited to 'core/cpu.c')
| -rw-r--r-- | core/cpu.c | 15 |
1 files changed, 5 insertions, 10 deletions
@@ -610,11 +610,6 @@ void cpu_set_sreset_enable(bool enabled) } } else if (proc_gen == proc_gen_p9) { - /* Don't use sreset idle on DD1 (has a number of bugs) */ - uint32_t version = mfspr(SPR_PVR); - if (is_power9n(version) && (PVR_VERS_MAJ(version) == 1)) - return; - sreset_enabled = enabled; sync(); /* @@ -643,11 +638,6 @@ void cpu_set_ipi_enable(bool enabled) } } else if (proc_gen == proc_gen_p9) { - /* Don't use doorbell on DD1 (requires darn for msgsync) */ - uint32_t version = mfspr(SPR_PVR); - if (is_power9n(version) && (PVR_VERS_MAJ(version) == 1)) - return; - ipi_enabled = enabled; sync(); if (!enabled) @@ -1014,6 +1004,11 @@ void init_boot_cpu(void) cpu_max_pir = mfspr(SPR_PIR); } + if (is_power9n(pvr) && (PVR_VERS_MAJ(pvr) == 1)) { + prerror("CPU: POWER9N DD1 is not supported\n"); + abort(); + } + prlog(PR_DEBUG, "CPU: Boot CPU PIR is 0x%04x PVR is 0x%08x\n", pir, pvr); |