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| author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2017-12-20 13:16:21 +1100 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2017-12-20 22:15:36 -0600 |
| commit | c7f2fab5c7854b11da909e79dd6c835d6ab91754 (patch) | |
| tree | 5c16bd1935d557c71a0c68dd0fb6c2ebccb8b845 /asm | |
| parent | f23d6c626bd657e967347bda872242427b0d9221 (diff) | |
| download | skiboot-c7f2fab5c7854b11da909e79dd6c835d6ab91754.zip skiboot-c7f2fab5c7854b11da909e79dd6c835d6ab91754.tar.gz skiboot-c7f2fab5c7854b11da909e79dd6c835d6ab91754.tar.bz2 | |
Add support for new gcc 7 parametrized stack protector
This gives us per-cpu guard values as well. For now I just
xor a magic constant with the CPU PIR value.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'asm')
| -rw-r--r-- | asm/head.S | 5 |
1 files changed, 5 insertions, 0 deletions
@@ -389,6 +389,11 @@ boot_entry: li %r0,0 std %r0,CPUTHREAD_STACK_BOT_MARK(%r13) #endif + /* Initialize the stack guard */ + LOAD_IMM64(%r3,STACK_CHECK_GUARD_BASE); + xor %r3,%r3,%r31 + std %r3,0(%r13) + /* Jump to C */ mr %r3,%r27 bl main_cpu_entry |