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author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2015-04-09 08:10:30 +1000 |
---|---|---|
committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2015-04-09 14:38:12 +1000 |
commit | 2f9eccfe836ed918202447c493d63486d29dba9c (patch) | |
tree | 3841bf901b48c3ada3a51a9e399638d7e631ea7e /asm | |
parent | 4a574d2bbf3779a409fac9c46d4ab44b40a1803d (diff) | |
download | skiboot-2f9eccfe836ed918202447c493d63486d29dba9c.zip skiboot-2f9eccfe836ed918202447c493d63486d29dba9c.tar.gz skiboot-2f9eccfe836ed918202447c493d63486d29dba9c.tar.bz2 |
Add Naples chip support
This adds the PVR and CFAM ID for the Naples chip. Otherwise treated as
a Venice.
This doesn't add the definitions for the new PHB revision yet
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'asm')
-rw-r--r-- | asm/head.S | 4 |
1 files changed, 4 insertions, 0 deletions
@@ -257,6 +257,8 @@ boot_entry: beq 2f cmpwi cr0,%r3,PVR_TYPE_P8E beq 2f + cmpwi cr0,%r3,PVR_TYPE_P8NVL + beq 2f attn /* Unsupported CPU type... what do we do ? */ /* P8 -> 8 threads */ @@ -656,6 +658,8 @@ init_shared_sprs: beq 3f cmpwi cr0,%r3,PVR_TYPE_P8 beq 3f + cmpwi cr0,%r3,PVR_TYPE_P8NVL + beq 3f /* Unsupported CPU type... what do we do ? */ b 9f |