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| author | Michael Neuling <mikey@neuling.org> | 2017-06-27 12:53:40 -0500 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2017-06-30 14:43:29 +1000 |
| commit | bdf6c2a69eae55536aa2e0cff937387e5e151c00 (patch) | |
| tree | 5dc0a6139a3839fe8667ae036b134d0b0bfeab1f /asm | |
| parent | ed8da3280e9ddeb33d76efaf4dff5b71eff642a7 (diff) | |
| download | skiboot-bdf6c2a69eae55536aa2e0cff937387e5e151c00.zip skiboot-bdf6c2a69eae55536aa2e0cff937387e5e151c00.tar.gz skiboot-bdf6c2a69eae55536aa2e0cff937387e5e151c00.tar.bz2 | |
Set POWER9 RPR SPR
Set POWER9 RPR SPR to 0x00000103070F1F3F. Same value as P8.
Without this, thread priorities inside a core don't work.
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'asm')
| -rw-r--r-- | asm/head.S | 3 |
1 files changed, 3 insertions, 0 deletions
@@ -734,6 +734,9 @@ init_shared_sprs: sync mtspr SPR_HMEER,%r3 isync + + LOAD_IMM64(%r3,0x00000103070F1F3F) + mtspr SPR_RPR,%r3 9: blr .global init_replicated_sprs |