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authorHaren Myneni <haren@linux.vnet.ibm.com>2018-06-06 00:38:20 -0700
committerStewart Smith <stewart@linux.ibm.com>2018-06-19 15:33:51 +1000
commite4f0860c4372786f7fe959e7a7807740e68dc9d3 (patch)
tree4ab523b8306c64736eb80438f0239d1e2e0c7bd7 /Makefile.rules
parentf4a95d7e1dd50ff5e33a8b7bfa0a8acdf3432a46 (diff)
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NX: Add NX coprocessor init opal call
The read offset (4:11) in Receive FIFO control register is incremented by FIFO size whenever CRB read by NX. But the index in RxFIFO has to match with the corresponding entry in FIFO maintained by VAS in kernel. VAS entry is reset to 0 when opening the receive window during driver initialization. So when NX842 is reloaded or in kexec boot, possibility of mismatch between RxFIFO control register and VAS entries in kernel. It could cause CRB failure / timeout from NX. This patch adds nx_coproc_init opal call for kernel to initialize readOffset (4:11) and Queued (15:23) in RxFIFO control register. Fixes: 3b3c5962f432 ("NX: Add P9 NX support for 842 compression engine") CC: stable # v5.8+ Signed-off-by: Haren Myneni <haren@us.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com> (cherry picked from commit 56026a13292453b072ad3cc9adf3dee960077f38) Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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