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| author | Frederic Barrat <fbarrat@linux.ibm.com> | 2020-02-17 10:43:49 +0100 |
|---|---|---|
| committer | Vasant Hegde <hegdevasant@linux.vnet.ibm.com> | 2020-03-10 16:06:10 +0530 |
| commit | 6e7aa58b2ab1e8e7f46289b50c82b68afbdda240 (patch) | |
| tree | 9bce883ee1c3d6f1668703cd2f689e4cc33be314 /LICENCE | |
| parent | d0e472a76f1ad5f8ce0f1b7929db1eea55041609 (diff) | |
| download | skiboot-6e7aa58b2ab1e8e7f46289b50c82b68afbdda240.zip skiboot-6e7aa58b2ab1e8e7f46289b50c82b68afbdda240.tar.gz skiboot-6e7aa58b2ab1e8e7f46289b50c82b68afbdda240.tar.bz2 | |
npu2-opencapi: Don't drive reset signal permanently
[ Upstream commit 53408440edb30de7ad18f12db285f15a0863fbc3 ]
A problem was found with the way we manage the I2C signal to reset
adapters. Skiboot currently always drives the value of the opencapi
reset signal. We set the I2C pin for reset in output mode and keep it
in output mode permanently. And since the reset signal is inverted, it
is explicitly set to high by the I2C controller pretty much all the
time.
When the opencapi card is powered off, for example on a reboot,
actively driving the I2C reset pin to high keeps applying a voltage to
part of the FPGA, which can leak current, send the FPGA in a bad state
since it's unexpected or even damage the card. To prevent damaging
adapters, the recommendation from the hardware team is to switch back
the pin to input mode at the end of a reset cycle. There are pull-up
resistors on the planar of all the platforms to make sure the reset
signal is high "naturally". When the slot is powered off, the reset
pin won't be kept high by the i2c controller any more.
Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com>
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Diffstat (limited to 'LICENCE')
0 files changed, 0 insertions, 0 deletions