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| author | Andrew Donnellan <andrew.donnellan@au1.ibm.com> | 2017-01-27 18:33:15 +1100 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2017-03-20 11:23:33 +1100 |
| commit | e9ede1c48b3bd5af3a68e2277146f3b6b1c7ca3c (patch) | |
| tree | e10c45ac4dcab9d330fe44f5d04ee1fc1572d8bb /LICENCE | |
| parent | a1eba9d29d17ff44fca1293b071023a9fbf4b938 (diff) | |
| download | skiboot-e9ede1c48b3bd5af3a68e2277146f3b6b1c7ca3c.zip skiboot-e9ede1c48b3bd5af3a68e2277146f3b6b1c7ca3c.tar.gz skiboot-e9ede1c48b3bd5af3a68e2277146f3b6b1c7ca3c.tar.bz2 | |
hw/phb3: disable CAPI mode during complete reset
When fast rebooting or kexec-ing a system with a PHB in CAPI mode, we need
to return the PHB to regular PCIe mode.
In order to do this, we have to reset a bunch of registers to their
pre-CAPI-mode state. However, doing this while there is traffic going over
the PCI link is dangerous and will generally cause a checkstop.
As such, we want to do this while the PHB is fenced. Conveniently, during a
complete reset we force a PHB fence, so this is a good opportunity to
disable CAPI mode.
When doing a complete reset, if the PHB is in CAPI mode, execute a sequence
of SCOMs to reset PHB-related registers back to their regular, PCIe mode
values.
Signed-off-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'LICENCE')
0 files changed, 0 insertions, 0 deletions