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| author | Shreyas B. Prabhu <shreyas@linux.vnet.ibm.com> | 2016-06-17 09:51:48 +0530 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2016-06-20 14:32:47 +1000 |
| commit | e4adcf05710ce8d061d23a4fd3bc9fef77ff8e73 (patch) | |
| tree | 9827daaab4325573feee42839daa282c56ecd7ff | |
| parent | 952daa69baca407383bc900911f6c40718a0e289 (diff) | |
| download | skiboot-e4adcf05710ce8d061d23a4fd3bc9fef77ff8e73.zip skiboot-e4adcf05710ce8d061d23a4fd3bc9fef77ff8e73.tar.gz skiboot-e4adcf05710ce8d061d23a4fd3bc9fef77ff8e73.tar.bz2 | |
doc/device-tree: Add documentation for ibm, cpu-idle-state-* properties
Add documentation for following nodes-
ibm,cpu-idle-state-pmicr ibm,cpu-idle-state-pmicr-mask
ibm,cpu-idle-state-psscr ibm,cpu-idle-state-psscr-mask
ibm,cpu-idle-state-flags
Also removing ibm,cpu-idle-state-names from FIXME since its
already documented.
Acked-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Shreyas B. Prabhu <shreyas@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
| -rw-r--r-- | doc/device-tree/ibm,opal/power-mgt.txt | 32 |
1 files changed, 27 insertions, 5 deletions
diff --git a/doc/device-tree/ibm,opal/power-mgt.txt b/doc/device-tree/ibm,opal/power-mgt.txt index d9cadb8..ca3487d 100644 --- a/doc/device-tree/ibm,opal/power-mgt.txt +++ b/doc/device-tree/ibm,opal/power-mgt.txt @@ -26,6 +26,33 @@ ibm,cpu-idle-state-residency-ns = <0x1 0x2 0x3> ibm,cpu-idle-state-latencies-ns = <0x1 0x2 0x3> +ibm,cpu-idle-state-pmicr ibm,cpu-idle-state-pmicr-mask +------------------------------------------------------ +In POWER8, idle states sleep and winkle have 2 modes- fast and deep. In fast +mode, idle state puts the core into threshold voltage whereas deep mode +completely turns off the core. Choosing fast vs deep mode for an idle state +can be done either via PM_GP1 scom or by writing to PMICR special register. +If using the PMICR path to choose fast/deep mode then ibm,cpu-idle-state-pmicr +and ibm,cpu-idle-state-pmicr-mask properties expose relevant PMICR bits and +values for corresponding idle states. + + +ibm,cpu-idle-state-psscr ibm,cpu-idle-state-psscr-mask +------------------------------------------------------ +In POWER ISA v3, there is a common instruction 'stop' to enter any idle state +and SPR PSSCR is used to specify which idle state needs to be entered upon +executing stop instruction. Properties ibm,cpu-idle-state-psscr and +ibm,cpu-idle-state-psscr-mask expose the relevant PSSCR bits and values for +corresponding idle states. + + +ibm,cpu-idle-state-flags +------------------------ +These flags are used to describe the characteristics of the idle states like +the kind of core state loss caused. These flags are used by the kernel to +save/restore appropriate context while using the idle states. + + ibm,pstate-ids -------------- @@ -67,8 +94,3 @@ ibm,pstate-core-max This property is added when ultra_turbo(WOF) is enabled. This property gives the list of max pstate for each 'n' number of active cores in the chip. -FIXME: document these: -ibm,cpu-idle-state-flags -ibm,cpu-idle-state-names -ibm,cpu-idle-state-pmicr -ibm,cpu-idle-state-pmicr-mask |