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authorOliver O'Halloran <oohall@gmail.com>2019-09-05 20:50:42 +1000
committerOliver O'Halloran <oohall@gmail.com>2019-09-06 16:59:59 +1000
commit9c9375fd4448d67e05b5b2a587273e5c285f9376 (patch)
tree9e885dce14782dad8e2a8640b920dfbb48a3aa92
parentfa161cd89fbf6f543f302651a0fd447b8dfc8b06 (diff)
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hw/psi: Remove explicit external IRQ policy
Rather than having an explicit policy use the presence of a platform defined external interrupt handler to determine whether we should direct the interrupt to OPAL or not. This lets us remove a pile of comments about why the policy is necessary and the comments about why we need to un-set it on P8+ Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
-rw-r--r--hw/psi.c14
-rw-r--r--include/psi.h12
-rw-r--r--platforms/astbmc/common.c3
-rw-r--r--platforms/astbmc/garrison.c11
-rw-r--r--platforms/astbmc/p8dnu.c11
5 files changed, 6 insertions, 45 deletions
diff --git a/hw/psi.c b/hw/psi.c
index d466f5a..bc170bb 100644
--- a/hw/psi.c
+++ b/hw/psi.c
@@ -29,7 +29,6 @@ static LIST_HEAD(psis);
static u64 psi_link_timer;
static u64 psi_link_timeout;
static bool psi_link_poll_active;
-static bool psi_ext_irq_policy = EXTERNAL_IRQ_POLICY_LINUX;
static void psi_activate_phb(struct psi *psi);
@@ -471,8 +470,8 @@ static uint64_t psi_p8_irq_attributes(struct irq_source *is, uint32_t isn)
if (psi->no_lpc_irqs && idx == P8_IRQ_PSI_LPC)
return IRQ_ATTR_TARGET_LINUX;
- if (idx == P8_IRQ_PSI_EXTERNAL &&
- psi_ext_irq_policy == EXTERNAL_IRQ_POLICY_LINUX)
+ /* Only direct external interrupts to OPAL if we have a handler */
+ if (idx == P8_IRQ_PSI_EXTERNAL && !platform.external_irq)
return IRQ_ATTR_TARGET_LINUX;
attr = IRQ_ATTR_TARGET_OPAL | IRQ_ATTR_TYPE_LSI;
@@ -625,6 +624,10 @@ static uint64_t psi_p9_irq_attributes(struct irq_source *is __unused,
if (is_lpc_serirq)
return lpc_get_irq_policy(psi->chip_id, idx - P9_PSI_IRQ_LPC_SIRQ0);
+ /* Only direct external interrupts to OPAL if we have a handler */
+ if (idx == P9_PSI_IRQ_EXTERNAL && !platform.external_irq)
+ return IRQ_ATTR_TARGET_LINUX | IRQ_ATTR_TYPE_LSI;
+
return IRQ_ATTR_TARGET_OPAL | IRQ_ATTR_TYPE_LSI;
}
@@ -649,11 +652,6 @@ static const struct irq_source_ops psi_p9_irq_ops = {
.name = psi_p9_irq_name,
};
-void psi_set_external_irq_policy(bool policy)
-{
- psi_ext_irq_policy = policy;
-}
-
static void psi_init_p8_interrupts(struct psi *psi)
{
uint32_t irq;
diff --git a/include/psi.h b/include/psi.h
index 9836e35..ee1e0a7 100644
--- a/include/psi.h
+++ b/include/psi.h
@@ -247,18 +247,6 @@ extern void psi_irq_reset(void);
extern void psi_enable_fsp_interrupt(struct psi *psi);
extern void psi_fsp_link_in_use(struct psi *psi);
-/*
- * Must be called by the platform probe() function as the policy
- * is established before platform.init
- *
- * This defines whether the external interrupt should be passed to
- * the OS or handled locally in skiboot. Return true for skiboot
- * handling. Default if not called is Linux.
- */
-#define EXTERNAL_IRQ_POLICY_LINUX false
-#define EXTERNAL_IRQ_POLICY_SKIBOOT true
-extern void psi_set_external_irq_policy(bool policy);
-
extern struct lock psi_lock;
#endif /* __PSI_H */
diff --git a/platforms/astbmc/common.c b/platforms/astbmc/common.c
index 85043f3..15ac231 100644
--- a/platforms/astbmc/common.c
+++ b/platforms/astbmc/common.c
@@ -465,9 +465,6 @@ void astbmc_early_init(void)
/* Hostboot forgets to populate the PSI BAR */
astbmc_fixup_psi_bar();
- /* Send external interrupts to me */
- psi_set_external_irq_policy(EXTERNAL_IRQ_POLICY_SKIBOOT);
-
if (ast_sio_init()) {
if (ast_io_init()) {
astbmc_fixup_uart();
diff --git a/platforms/astbmc/garrison.c b/platforms/astbmc/garrison.c
index 1b0f865..caf6113 100644
--- a/platforms/astbmc/garrison.c
+++ b/platforms/astbmc/garrison.c
@@ -258,17 +258,6 @@ static bool garrison_probe(void)
/* Lot of common early inits here */
astbmc_early_init();
- /*
- * Override external interrupt policy -> send to Linux
- *
- * On Naples, we get LPC interrupts via the built-in LPC
- * controller demuxer, not an external CPLD. The external
- * interrupt is for other uses, such as the TPM chip, we
- * currently route it to Linux, but we might change that
- * later if we decide we need it.
- */
- psi_set_external_irq_policy(EXTERNAL_IRQ_POLICY_LINUX);
-
/* Fixups until HB get the NPU bindings */
dt_create_npu();
diff --git a/platforms/astbmc/p8dnu.c b/platforms/astbmc/p8dnu.c
index a76fbd9..e223d15 100644
--- a/platforms/astbmc/p8dnu.c
+++ b/platforms/astbmc/p8dnu.c
@@ -307,17 +307,6 @@ static bool p8dnu_probe(void)
/* Lot of common early inits here */
astbmc_early_init();
- /*
- * Override external interrupt policy -> send to Linux
- *
- * On Naples, we get LPC interrupts via the built-in LPC
- * controller demuxer, not an external CPLD. The external
- * interrupt is for other uses, such as the TPM chip, we
- * currently route it to Linux, but we might change that
- * later if we decide we need it.
- */
- psi_set_external_irq_policy(EXTERNAL_IRQ_POLICY_LINUX);
-
/* Fixups until HB get the NPU bindings */
dt_create_npu();