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authorNicholas Piggin <npiggin@gmail.com>2021-10-01 20:46:47 +1000
committerVasant Hegde <hegdevasant@linux.vnet.ibm.com>2021-10-02 10:30:27 +0530
commitdda72e7ff60c36ed5ed721ad2b7f6277f7a9363f (patch)
tree66d42ca9a2648c2008a63be4670837a4b5a5c148
parent7744e8ac4b5ad066fee21761f1696707127e0408 (diff)
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external/mambo: Updates for POWER10 configuration for DD2.0
Update PVR and mambo f000f bits: - Set POWER10 to DD2.0 Update SIM_CTRL and SIM_CTRL1 bits: - Set the LPAR-per-core mode bit. This is required for SMT KVM to work. - Set ARC0/ARC1 bits which enable atomic RC update interrupts (not hardware updates), which matches implementation. - Enable DEXCR, HAIL, ROP, BHRB disable, block BHRB writes in PR=0, and RFC02628 on POWER10. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
-rw-r--r--external/mambo/skiboot.tcl18
-rw-r--r--hw/xscom.c2
2 files changed, 16 insertions, 4 deletions
diff --git a/external/mambo/skiboot.tcl b/external/mambo/skiboot.tcl
index 91617b7..8038d2a 100644
--- a/external/mambo/skiboot.tcl
+++ b/external/mambo/skiboot.tcl
@@ -144,9 +144,11 @@ if { $default_config == "P9" } {
}
if { $default_config == "P10" } {
- # PVR configured for POWER10 DD1.0
- myconf config processor/initial/PVR 0x800100
- myconf config processor/initial/SIM_CTRL1 0xc228100400000000
+ # PVR configured for POWER10 DD2.0, big-core, LPAR-per-thread
+ # Small-core has bit 0x1000 set.
+ myconf config processor/initial/PVR 0x800200
+ myconf config processor/initial/SIM_CTRL 0x0c1dd60000000000
+ myconf config processor/initial/SIM_CTRL1 0xc0400c0400040a40
if { $mconf(numa) } {
myconf config memory_region_id_shift 44
@@ -164,6 +166,16 @@ if { [info exists env(SKIBOOT_SIMCONF)] } {
define machine myconf mysim
+# Some mambo does not expose SIM_CTRL as a config option. Also set the SPRs
+# after machine is defined.
+if { $default_config == "P10" } {
+ for { set c 0 } { $c < $mconf(cpus) } { incr c } {
+ for { set t 0 } { $t < $mconf(threads) } { incr t } {
+ mysim mcm 0 cpu $c thread $t set spr ctrl 0x0c1dd60000000000
+ }
+ }
+}
+
#
# Include various utilities
#
diff --git a/hw/xscom.c b/hw/xscom.c
index 3474572..298fe0c 100644
--- a/hw/xscom.c
+++ b/hw/xscom.c
@@ -826,7 +826,7 @@ int64_t xscom_read_cfam_chipid(uint32_t partid, uint32_t *chip_id)
*/
if (chip_quirk(QUIRK_NO_F000F)) {
if (proc_gen == proc_gen_p10)
- val = 0x120DA04980000000UL; /* P10 DD1.0 */
+ val = 0x220DA04980000000UL; /* P10 DD2.0 */
else if (proc_gen == proc_gen_p9)
val = 0x203D104980000000UL; /* P9 Nimbus DD2.3 */
else