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| author | Stewart Smith <stewart@linux.vnet.ibm.com> | 2017-11-17 09:34:03 +1100 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2017-11-20 20:35:51 -0600 |
| commit | 701556d2ea9b890a389183907ae484b78c05c665 (patch) | |
| tree | 1e4c21157ac8bb0fe7211779e39fadd369a5d27c | |
| parent | 65f9abea8e8cfd7f711a5c54217b5505826ff497 (diff) | |
| download | skiboot-701556d2ea9b890a389183907ae484b78c05c665.zip skiboot-701556d2ea9b890a389183907ae484b78c05c665.tar.gz skiboot-701556d2ea9b890a389183907ae484b78c05c665.tar.bz2 | |
OCC: Increase max pstate check on P9 to 255
This has changed from P8, we can now have > 127 pstates.
This was observed on Boston during WoF bringup.
Reported-by: Minda Wei <minda.wei@ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Reported-by: Francesco A Campisano <campisan@us.ibm.com>
Reviewed-by: Vaidyanathan Srinivasan <svaidy@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
| -rw-r--r-- | hw/occ.c | 10 |
1 files changed, 6 insertions, 4 deletions
@@ -612,13 +612,15 @@ static bool add_cpu_pstate_properties(int *pstate_nom) nr_pstates = labs(pmax - pmin) + 1; prlog(PR_DEBUG, "OCC: Version %x Min %d Nom %d Max %d Nr States %d\n", occ_data->version, pmin, pnom, pmax, nr_pstates); - if (nr_pstates <= 1 || nr_pstates > 128) { + if ((occ_data->version == 0x90 && (nr_pstates <= 1)) || + (occ_data->version <= 0x02 && + (nr_pstates <= 1 || nr_pstates > 128))) { /** * @fwts-label OCCInvalidPStateRange * @fwts-advice The number of pstates is outside the valid - * range (currently <=1 or > 128), so OPAL has not added - * pstates to the device tree. This means that OCC (On Chip - * Controller) will be non-functional. This means + * range (currently <=1 or > 128 on p8, >255 on P9), so OPAL + * has not added pstates to the device tree. This means that + * OCC (On Chip Controller) will be non-functional. This means * that CPU idle states and CPU frequency scaling * will not be functional. */ |