diff options
author | Michael Neuling <mikey@neuling.org> | 2017-11-29 11:38:21 +1100 |
---|---|---|
committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2017-11-30 22:28:33 -0600 |
commit | 73ad014b8785caa249a6d305d8c8502064912908 (patch) | |
tree | ce9815e9ce0fdfdd7f55267089c4291a88865fe4 | |
parent | 3881970673a21c9cd82a6fc3ebab334299a51bf3 (diff) | |
download | skiboot-73ad014b8785caa249a6d305d8c8502064912908.zip skiboot-73ad014b8785caa249a6d305d8c8502064912908.tar.gz skiboot-73ad014b8785caa249a6d305d8c8502064912908.tar.bz2 |
phb4: Change default GEN3 lane equalisation setting to 0x54
Currently our GEN3 lane equalisation settings are set to 0x77. Change
this to 0x54. This change will allow us to train at GEN3 in a shorter
time and more consistently.
This setting gives us a TX preset 0x4 and RX hint 0x5. This gives a
boost in gain for high frequency signaling. It allows the most optimal
continuous time linear equalizers (CTLE) for the remote receiver port
and de-emphasis and pre-shoot for the remote transmitter port.
Machine Readable Workbooks (MRW) are moving to this new value also.
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
-rw-r--r-- | hw/phb4.c | 4 |
1 files changed, 2 insertions, 2 deletions
@@ -4843,8 +4843,8 @@ static const struct irq_source_ops phb4_lsi_ops = { #ifdef HAVE_BIG_ENDIAN static u64 lane_eq_default[8] = { - 0x7777777777777777, 0x7777777777777777, - 0x7777777777777777, 0x7777777777777777, + 0x5454545454545454, 0x5454545454545454, + 0x5454545454545454, 0x5454545454545454, 0x7777777777777777, 0x7777777777777777, 0x7777777777777777, 0x7777777777777777 }; |