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| author | Christophe Lombard <clombard@linux.vnet.ibm.com> | 2017-10-24 16:10:05 +0200 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2017-11-09 16:52:30 -0600 |
| commit | 5c221866c88f269a82620b8ad244b68f86e05df0 (patch) | |
| tree | 024b25ca32236d78df06cadbc5d293e1818e2d92 | |
| parent | 8b6c089342c762a24eb3df7daf46eee8cae1d0eb (diff) | |
| download | skiboot-5c221866c88f269a82620b8ad244b68f86e05df0.zip skiboot-5c221866c88f269a82620b8ad244b68f86e05df0.tar.gz skiboot-5c221866c88f269a82620b8ad244b68f86e05df0.tar.bz2 | |
capi: move the acknowledge of the HMI interrupt
We need to acknowledge an eventual HMI initiated by the previous forced
fence on the PHB to work around a non-existent PE in the phb4_creset()
function.
For this reason do_capp_recovery_scoms() is called now at the
beginning of the step: PHB4_SLOT_CRESET_WAIT_CQ
Signed-off-by: Christophe Lombard <clombard@linux.vnet.ibm.com>
Acked-by: Vaibhav Jain <vaibhav@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
| -rw-r--r-- | hw/phb4.c | 8 |
1 files changed, 4 insertions, 4 deletions
@@ -2840,10 +2840,6 @@ static int64_t phb4_creset(struct pci_slot *slot) case PHB4_SLOT_CRESET_START: PHBDBG(p, "CRESET: Starts\n"); - /* capp recovery */ - if (p->flags & PHB4_CAPP_RECOVERY) - do_capp_recovery_scoms(p); - phb4_prepare_link_change(slot, false); /* Clear error inject register, preventing recursive errors */ xscom_write(p->chip_id, p->pe_xscom + 0x2, 0x0); @@ -2879,6 +2875,10 @@ static int64_t phb4_creset(struct pci_slot *slot) slot->retries = 500; return pci_slot_set_sm_timeout(slot, msecs_to_tb(10)); case PHB4_SLOT_CRESET_WAIT_CQ: + /* capp recovery */ + if (p->flags & PHB4_CAPP_RECOVERY) + do_capp_recovery_scoms(p); + // Wait until operations are complete xscom_read(p->chip_id, p->pe_stk_xscom + 0xc, &pbcq_status); if (!(pbcq_status & 0xC000000000000000)) { |