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authorAlistair Popple <alistair@popple.id.au>2014-11-13 17:16:07 +1100
committerStewart Smith <stewart@linux.vnet.ibm.com>2014-12-02 18:54:47 +1100
commit28a178751b4195e546e0e8d429f988793c18f848 (patch)
tree46841d8b1f50c8ccb227d89895c97198ef93050d
parente9ba0c924d6eed70cef4e41695196705759e60e6 (diff)
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elog: Clean up error logging headers
Commit cf6f4e8912d29fb89ce85c84834607065ad595a5 introduced a platform independent frontend for error logging. However it failed to move the generic parts of the fsp-elog.h header into the platform independent one, instead relying on the fact that up until now fsp-elog.h was included whenever a function needed to log errors. This patch moves the platform independent defines into the frontend header file (errorlog.h) and removes the include of the platform specific header in generic code paths. Signed-off-by: Alistair Popple <alistair@popple.id.au> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
-rw-r--r--core/errorlog.c2
-rw-r--r--core/pel.c2
-rw-r--r--core/test/run-pel.c2
-rw-r--r--doc/error-logging.txt6
-rw-r--r--hw/fsp/fsp-codeupdate.c2
-rw-r--r--hw/fsp/fsp-dump.c2
-rw-r--r--hw/fsp/fsp-leds.c2
-rw-r--r--hw/fsp/fsp-mdst-table.c2
-rw-r--r--hw/fsp/fsp-mem-err.c2
-rw-r--r--hw/fsp/fsp-nvram.c2
-rw-r--r--hw/fsp/fsp-op-panel.c2
-rw-r--r--hw/fsp/fsp-rtc.c2
-rw-r--r--hw/fsp/fsp-sensor.c2
-rw-r--r--hw/fsp/fsp-surveillance.c2
-rw-r--r--hw/fsp/fsp.c2
-rw-r--r--hw/lpc-uart.c2
-rw-r--r--hw/lpc.c2
-rw-r--r--hw/occ.c2
-rw-r--r--hw/slw.c2
-rw-r--r--hw/xscom.c2
-rw-r--r--include/errorlog.h176
-rw-r--r--include/fsp-elog.h187
22 files changed, 196 insertions, 211 deletions
diff --git a/core/errorlog.c b/core/errorlog.c
index dd34c3f..a5b1dbb 100644
--- a/core/errorlog.c
+++ b/core/errorlog.c
@@ -22,7 +22,7 @@
#include <skiboot.h>
#include <lock.h>
#include <errorlog.h>
-#include <fsp-elog.h>
+#include <errorlog.h>
#include <pool.h>
/*
diff --git a/core/pel.c b/core/pel.c
index faa622b..47dffee 100644
--- a/core/pel.c
+++ b/core/pel.c
@@ -1,5 +1,5 @@
#include <string.h>
-#include <fsp-elog.h>
+#include <errorlog.h>
#include <device.h>
#include <fsp.h>
#include <pel.h>
diff --git a/core/test/run-pel.c b/core/test/run-pel.c
index b7a5b26..40aa374 100644
--- a/core/test/run-pel.c
+++ b/core/test/run-pel.c
@@ -42,7 +42,7 @@ const void *dt_prop_get(const struct dt_node *node __unused, const char *prop __
return dt_prop;
}
-int fsp_rtc_get_cached_tod(uint32_t *year_month_day,
+int rtc_cache_get_datetime(uint32_t *year_month_day,
uint64_t *hour_minute_second_millisecond)
{
*year_month_day = 0;
diff --git a/doc/error-logging.txt b/doc/error-logging.txt
index a29d368..ee21d22 100644
--- a/doc/error-logging.txt
+++ b/doc/error-logging.txt
@@ -32,7 +32,7 @@ Step 1: To report an error, invoke opal_elog_create() with required argument.
Parameters:
- int reason_code: Reason for failure as stated in include/fsp-elog.h
+ int reason_code: Reason for failure as stated in include/errorlog.h
for Sapphire
Eg: Reason code for code-update failures can be
OPAL_RC_CU_INIT -> Initialisation failure
@@ -53,7 +53,7 @@ Step 1: To report an error, invoke opal_elog_create() with required argument.
#define OPAL_MISC_ERR_EVT 0x04
uint16_t component_id: Component ID of Sapphire component as
- listed in include/fsp-elog.h
+ listed in include/errorlog.h
uint8_t subsystem_id: ID of the sub-system reporting error.
/* OPAL Subsystem IDs listed for reporting events/errors */
@@ -129,7 +129,7 @@ Step 1: To report an error, invoke opal_elog_create() with required argument.
should be provided during reporting of an event/error.
- uint32_t reason_code: Reason for failure as stated in include/fsp-elog.h
+ uint32_t reason_code: Reason for failure as stated in include/errorlog.h
for Sapphire
Eg: Reason code for code-update failures can be
OPAL_RC_CU_INIT -> Initialisation failure
diff --git a/hw/fsp/fsp-codeupdate.c b/hw/fsp/fsp-codeupdate.c
index bbdac37..626b384 100644
--- a/hw/fsp/fsp-codeupdate.c
+++ b/hw/fsp/fsp-codeupdate.c
@@ -21,7 +21,7 @@
#include <lock.h>
#include <device.h>
#include <ccan/endian/endian.h>
-#include <fsp-elog.h>
+#include <errorlog.h>
#include "fsp-codeupdate.h"
diff --git a/hw/fsp/fsp-dump.c b/hw/fsp/fsp-dump.c
index 891bb20..9f0a693 100644
--- a/hw/fsp/fsp-dump.c
+++ b/hw/fsp/fsp-dump.c
@@ -40,7 +40,7 @@
#include <lock.h>
#include <device.h>
#include <skiboot.h>
-#include <fsp-elog.h>
+#include <errorlog.h>
/*
* Max outstanding dumps to retrieve
diff --git a/hw/fsp/fsp-leds.c b/hw/fsp/fsp-leds.c
index 904a18e..c131edd 100644
--- a/hw/fsp/fsp-leds.c
+++ b/hw/fsp/fsp-leds.c
@@ -30,7 +30,7 @@
#include <timebase.h>
#include <hdata/spira.h>
#include <hdata/hdata.h>
-#include <fsp-elog.h>
+#include <errorlog.h>
#include "fsp-leds.h"
diff --git a/hw/fsp/fsp-mdst-table.c b/hw/fsp/fsp-mdst-table.c
index 2dcbd50..b220fbe 100644
--- a/hw/fsp/fsp-mdst-table.c
+++ b/hw/fsp/fsp-mdst-table.c
@@ -31,7 +31,7 @@
#include <opal.h>
#include <lock.h>
#include <skiboot.h>
-#include <fsp-elog.h>
+#include <errorlog.h>
#include <fsp-mdst-table.h>
/*
diff --git a/hw/fsp/fsp-mem-err.c b/hw/fsp/fsp-mem-err.c
index 5628734..d73736b 100644
--- a/hw/fsp/fsp-mem-err.c
+++ b/hw/fsp/fsp-mem-err.c
@@ -19,7 +19,7 @@
#include <opal-msg.h>
#include <lock.h>
#include <fsp.h>
-#include <fsp-elog.h>
+#include <errorlog.h>
/* debug message prefix */
#define PREFIX "FSPMEMERR: "
diff --git a/hw/fsp/fsp-nvram.c b/hw/fsp/fsp-nvram.c
index 534ad0d..257cdd6 100644
--- a/hw/fsp/fsp-nvram.c
+++ b/hw/fsp/fsp-nvram.c
@@ -19,7 +19,7 @@
#include <opal.h>
#include <lock.h>
#include <device.h>
-#include <fsp-elog.h>
+#include <errorlog.h>
/*
* The FSP NVRAM API operates in "blocks" of 4K. It is entirely exposed
diff --git a/hw/fsp/fsp-op-panel.c b/hw/fsp/fsp-op-panel.c
index e2df34e..0693939 100644
--- a/hw/fsp/fsp-op-panel.c
+++ b/hw/fsp/fsp-op-panel.c
@@ -21,7 +21,7 @@
#include <device.h>
#include <processor.h>
#include <opal-msg.h>
-#include <fsp-elog.h>
+#include <errorlog.h>
DEFINE_LOG_ENTRY(OPAL_RC_PANEL_WRITE, OPAL_PLATFORM_ERR_EVT, OPAL_OP_PANEL,
OPAL_MISC_SUBSYSTEM, OPAL_PREDICTIVE_ERR_GENERAL,
diff --git a/hw/fsp/fsp-rtc.c b/hw/fsp/fsp-rtc.c
index eff2c84..704648e 100644
--- a/hw/fsp/fsp-rtc.c
+++ b/hw/fsp/fsp-rtc.c
@@ -21,7 +21,7 @@
#include <time.h>
#include <time-utils.h>
#include <opal-msg.h>
-#include <fsp-elog.h>
+#include <errorlog.h>
#include <device.h>
/*
diff --git a/hw/fsp/fsp-sensor.c b/hw/fsp/fsp-sensor.c
index d2b45d4..c40ba23 100644
--- a/hw/fsp/fsp-sensor.c
+++ b/hw/fsp/fsp-sensor.c
@@ -35,7 +35,7 @@
#include <device.h>
#include <spcn.h>
#include <opal-msg.h>
-#include<fsp-elog.h>
+#include<errorlog.h>
#define INVALID_DATA ((uint32_t)-1)
diff --git a/hw/fsp/fsp-surveillance.c b/hw/fsp/fsp-surveillance.c
index a811889..ebe19d6 100644
--- a/hw/fsp/fsp-surveillance.c
+++ b/hw/fsp/fsp-surveillance.c
@@ -19,7 +19,7 @@
#include <processor.h>
#include <timebase.h>
#include <fsp-sysparam.h>
-#include <fsp-elog.h>
+#include <errorlog.h>
static bool fsp_surv_state = false;
static bool fsp_surv_ack_pending = false;
diff --git a/hw/fsp/fsp.c b/hw/fsp/fsp.c
index 57c068b..ba2f01b 100644
--- a/hw/fsp/fsp.c
+++ b/hw/fsp/fsp.c
@@ -34,7 +34,7 @@
#include <trace.h>
#include <timebase.h>
#include <cpu.h>
-#include <fsp-elog.h>
+#include <errorlog.h>
#include <opal.h>
#include <opal-msg.h>
diff --git a/hw/lpc-uart.c b/hw/lpc-uart.c
index fe1fabd..2e6114a 100644
--- a/hw/lpc-uart.c
+++ b/hw/lpc-uart.c
@@ -21,7 +21,7 @@
#include <device.h>
#include <interrupts.h>
#include <processor.h>
-#include <fsp-elog.h>
+#include <errorlog.h>
#include <trace.h>
#include <timebase.h>
#include <cpu.h>
diff --git a/hw/lpc.c b/hw/lpc.c
index d09692a..e2e848b 100644
--- a/hw/lpc.c
+++ b/hw/lpc.c
@@ -21,7 +21,7 @@
#include <chip.h>
#include <lpc.h>
#include <timebase.h>
-#include <fsp-elog.h>
+#include <errorlog.h>
DEFINE_LOG_ENTRY(OPAL_RC_LPC_READ, OPAL_PLATFORM_ERR_EVT, OPAL_LPC,
OPAL_MISC_SUBSYSTEM, OPAL_PREDICTIVE_ERR_GENERAL,
diff --git a/hw/occ.c b/hw/occ.c
index e1eaf30..34949d0 100644
--- a/hw/occ.c
+++ b/hw/occ.c
@@ -23,7 +23,7 @@
#include <fsp.h>
#include <timebase.h>
#include <hostservices.h>
-#include <fsp-elog.h>
+#include <errorlog.h>
/* OCC Communication Area for PStates */
diff --git a/hw/slw.c b/hw/slw.c
index b72a0aa..1c660c1 100644
--- a/hw/slw.c
+++ b/hw/slw.c
@@ -26,7 +26,7 @@
#include <chiptod.h>
#include <interrupts.h>
#include <timebase.h>
-#include <fsp-elog.h>
+#include <errorlog.h>
#include <libfdt/libfdt.h>
#ifdef __HAVE_LIBPORE__
diff --git a/hw/xscom.c b/hw/xscom.c
index 1698135..94e088c 100644
--- a/hw/xscom.c
+++ b/hw/xscom.c
@@ -21,7 +21,7 @@
#include <device.h>
#include <chip.h>
#include <centaur.h>
-#include <fsp-elog.h>
+#include <errorlog.h>
/* Mask of bits to clear in HMER before an access */
#define HMER_CLR_MASK (~(SPR_HMER_XSCOM_FAIL | \
diff --git a/include/errorlog.h b/include/errorlog.h
index fcfb215..7879b7b 100644
--- a/include/errorlog.h
+++ b/include/errorlog.h
@@ -17,6 +17,10 @@
#ifndef __ERRORLOG_H
#define __ERRORLOG_H
+#include <opal.h>
+#include <stdint.h>
+#include <ccan/list/list.h>
+
/* Classification of error/events type reported on OPAL */
/* Platform Events/Errors: Report Machine Check Interrupt */
#define OPAL_PLATFORM_ERR_EVT 0x01
@@ -147,6 +151,172 @@ struct opal_err_info {
void (*call_out)(struct errorlog *buf, void *data, uint16_t size);
};
+/* Component IDs */
+/* In PEL error log format, Creator ID is hypervisor
+ * But we can have various component ID to distinguish
+ * which component in hypervisor is reporting the error
+ * This is 2 bytes long,
+ * first byte corresponds to Component IDs
+ * Second byte is reserved for the Reason code.
+ * Component ID is mapped to readable 4-digit ascii
+ * character name in FSP and displayed.
+ */
+/* SAPPHIRE components */
+#define OPAL_CODEUPDATE 0x4355 /* CU */
+#define OPAL_CONSOLE 0x434E /* CN */
+#define OPAL_CEC 0x4345 /* CE */
+#define OPAL_CHIP 0x4348 /* CH */
+#define OPAL_ELOG 0x454C /* EL */
+#define OPAL_NVRAM 0x4E56 /* NV */
+#define OPAL_RTC 0x5254 /* RT */
+#define OPAL_SURVEILLANCE 0x5355 /* SU */
+#define OPAL_SYSPARAM 0x5350 /* SP */
+#define OPAL_LPC 0x4C50 /* LP */
+#define OPAL_UART 0x5541 /* UA */
+#define OPAL_OCC 0x4F43 /* OC */
+#define OPAL_OP_PANEL 0x4F50 /* OP */
+#define OPAL_PHB3 0x5048 /* PH */
+#define OPAL_PSI 0x5053 /* PS */
+#define OPAL_VPD 0x5650 /* VP */
+#define OPAL_XSCOM 0x5853 /* XS */
+#define OPAL_PCI 0x5043 /* PC */
+#define OPAL_MISC 0x4D49 /* MI */
+#define OPAL_ATTN 0x4154 /* AT */
+#define OPAL_MEM_ERR 0x4D45 /* ME */
+#define OPAL_CENTAUR 0x4354 /* CT */
+#define OPAL_MFSI 0x4D46 /* MF */
+#define OPAL_DUMP 0x4455 /* DU */
+#define OPAL_LED 0x4C45 /* LE */
+#define OPAL_SENSOR 0x5345 /* SE */
+#define OPAL_SLW 0x534C /* SL */
+#define OPAL_FSP 0x4650 /* FP */
+#define OPAL_I2C 0x4943 /* IC */
+
+/* SAPPHIRE SRC componenet ID*/
+#define OPAL_CU 0x1000
+#define OPAL_CN 0x2000
+#define OPAL_CE 0x3000
+#define OPAL_CH 0x4000
+#define OPAL_EL 0x5000
+#define OPAL_NV 0x6000
+#define OPAL_RT 0x7000
+#define OPAL_SU 0x8000
+#define OPAL_SP 0x9000
+#define OPAL_LP 0xa000
+#define OPAL_UA 0xb000
+#define OPAL_OC 0xc000
+#define OPAL_OP 0xd000
+#define OPAL_PH 0xe000
+#define OPAL_PS 0xf000
+#define OPAL_VP 0x1000
+#define OPAL_XS 0x1100
+#define OPAL_PC 0x1200
+#define OPAL_MI 0x1300
+#define OPAL_AT 0x1400
+#define OPAL_ME 0x1500
+#define OPAL_CT 0x1600
+#define OPAL_MF 0x1700
+#define OPAL_DU 0x1800
+#define OPAL_LE 0x1900
+#define OPAL_SE 0x2000
+#define OPAL_SL 0x2100
+#define OPAL_FP 0x2200
+#define OPAL_IC 0x2300
+
+enum opal_reasoncode {
+/* code update */
+ OPAL_RC_CU_FLASH = OPAL_CU | 0x10,
+ OPAL_RC_CU_INIT = OPAL_CU | 0x11,
+ OPAL_RC_CU_SG_LIST = OPAL_CU | 0x12,
+ OPAL_RC_CU_COMMIT = OPAL_CU | 0x13,
+ OPAL_RC_CU_MSG = OPAL_CU | 0x14,
+ OPAL_RC_CU_NOTIFY = OPAL_CU | 0x15,
+ OPAL_RC_CU_MARKER_LID = OPAL_CU | 0x16,
+/* NVRAM */
+ OPAL_RC_NVRAM_INIT = OPAL_NV | 0x10,
+ OPAL_RC_NVRAM_OPEN = OPAL_NV | 0x11,
+ OPAL_RC_NVRAM_SIZE = OPAL_NV | 0x12,
+ OPAL_RC_NVRAM_WRITE = OPAL_NV | 0x13,
+ OPAL_RC_NVRAM_READ = OPAL_NV | 0x14,
+/* CENTAUR */
+ OPAL_RC_CENTAUR_INIT = OPAL_CT | 0x10,
+ OPAL_RC_CENTAUR_RW_ERR = OPAL_CT | 0x11,
+/* MFSI */
+ OPAL_RC_MFSI_RW_ERR = OPAL_MF | 0x10,
+/* UART */
+ OPAL_RC_UART_INIT = OPAL_UA | 0x10,
+/* OCC */
+ OPAL_RC_OCC_RESET = OPAL_OC | 0x10,
+ OPAL_RC_OCC_LOAD = OPAL_OC | 0x11,
+ OPAL_RC_OCC_PSTATE_INIT = OPAL_OC | 0x12,
+ OPAL_RC_OCC_TIMEOUT = OPAL_OC | 0x13,
+/* RTC */
+ OPAL_RC_RTC_READ = OPAL_RT | 0x10,
+ OPAL_RC_RTC_TOD = OPAL_RT | 0x11,
+/* SURVEILLANCE */
+ OPAL_RC_SURVE_INIT = OPAL_SU | 0x10,
+ OPAL_RC_SURVE_STATUS = OPAL_SU | 0x11,
+ OPAL_RC_SURVE_ACK = OPAL_SU | 0x12,
+/* SYSPARAM */
+ OPAL_RC_SYSPARM_INIT = OPAL_SP | 0x10,
+ OPAL_RC_SYSPARM_MSG = OPAL_SP | 0x11,
+/* LPC */
+ OPAL_RC_LPC_READ = OPAL_LP | 0x10,
+ OPAL_RC_LPC_WRITE = OPAL_LP | 0x11,
+/* OP_PANEL */
+ OPAL_RC_PANEL_WRITE = OPAL_OP | 0x10,
+/* PSI */
+ OPAL_RC_PSI_INIT = OPAL_PS | 0x10,
+ OPAL_RC_PSI_IRQ_RESET = OPAL_PS | 0x11,
+/* XSCOM */
+ OPAL_RC_XSCOM_RW = OPAL_XS | 0x10,
+ OPAL_RC_XSCOM_INDIRECT_RW = OPAL_XS | 0x11,
+ OPAL_RC_XSCOM_RESET = OPAL_XS | 0x12,
+/* PCI */
+ OPAL_RC_PCI_INIT_SLOT = OPAL_PC | 0x10,
+ OPAL_RC_PCI_ADD_SLOT = OPAL_PC | 0x11,
+ OPAL_RC_PCI_SCAN = OPAL_PC | 0x12,
+ OPAL_RC_PCI_RESET_PHB = OPAL_PC | 0x10,
+/* ATTN */
+ OPAL_RC_ATTN = OPAL_AT | 0x10,
+/* MEM_ERR */
+ OPAL_RC_MEM_ERR_RES = OPAL_ME | 0x10,
+ OPAL_RC_MEM_ERR_DEALLOC = OPAL_ME | 0x11,
+/* DUMP */
+ OPAL_RC_DUMP_INIT = OPAL_DU | 0x10,
+ OPAL_RC_DUMP_LIST = OPAL_DU | 0x11,
+ OPAL_RC_DUMP_ACK = OPAL_DU | 0x12,
+ OPAL_RC_DUMP_MDST_INIT = OPAL_DU | 0x13,
+ OPAL_RC_DUMP_MDST_UPDATE= OPAL_DU | 0x14,
+ OPAL_RC_DUMP_MDST_ADD = OPAL_DU | 0x15,
+ OPAL_RC_DUMP_MDST_REMOVE= OPAL_DU | 0x16,
+/* LED */
+ OPAL_RC_LED_SPCN = OPAL_LE | 0x10,
+ OPAL_RC_LED_BUFF = OPAL_LE | 0x11,
+ OPAL_RC_LED_LC = OPAL_LE | 0x12,
+ OPAL_RC_LED_STATE = OPAL_LE | 0x13,
+ OPAL_RC_LED_SUPPORT = OPAL_LE | 0x14,
+/* SENSOR */
+ OPAL_RC_SENSOR_INIT = OPAL_SE | 0x10,
+ OPAL_RC_SENSOR_READ = OPAL_SE | 0x11,
+ OPAL_RC_SENSOR_ASYNC_COMPLETE
+ = OPAL_SE | 0x12,
+/* SLW */
+ OPAL_RC_SLW_INIT = OPAL_SL | 0x10,
+ OPAL_RC_SLW_SET = OPAL_SL | 0x11,
+ OPAL_RC_SLW_GET = OPAL_SL | 0x12,
+ OPAL_RC_SLW_REG = OPAL_SL | 0x13,
+/* FSP */
+ OPAL_RC_FSP_POLL_TIMEOUT
+ = OPAL_FP | 0x10,
+/* I2C */
+ OPAL_RC_I2C_INIT = OPAL_IC | 0X10,
+ OPAL_RC_I2C_START_REQ = OPAL_IC | 0X11,
+ OPAL_RC_I2C_TIMEOUT = OPAL_IC | 0x12,
+ OPAL_RC_I2C_TRANSFER = OPAL_IC | 0x13,
+ OPAL_RC_I2C_RESET = OPAL_IC | 0x14,
+};
+
#define DEFINE_LOG_ENTRY(reason, type, id, subsys, \
severity, subtype, callout_func) struct opal_err_info err_##reason = \
{ .reason_code = reason, .err_type = type, .cmp_id = id, \
@@ -161,11 +331,13 @@ void log_simple_error(struct opal_err_info *e_info, const char *fmt, ...) __attr
void log_error(struct opal_err_info *e_info, void *data, uint16_t size,
const char *fmt, ...) __attribute__ ((format (printf, 4, 5)));
-int opal_elog_update_user_dump(struct errorlog *buf, unsigned char *data,
- uint32_t tag, uint16_t size);
+#define e_info(reason_code) err_##reason_code
struct errorlog *opal_elog_create(struct opal_err_info *e_info) __warn_unused_result;
+int opal_elog_update_user_dump(struct errorlog *buf, unsigned char *data,
+ uint32_t tag, uint16_t size);
+
/* Called by the backend after an error has been logged by the
* backend. If the error could not be logged successfully success is
* set to false. */
diff --git a/include/fsp-elog.h b/include/fsp-elog.h
index d1f9147..1522b18 100644
--- a/include/fsp-elog.h
+++ b/include/fsp-elog.h
@@ -35,189 +35,10 @@ enum elog_head_state {
ELOG_STATE_REJECTED, /* resend all pending logs to linux */
};
-/* Component IDs */
-/* In PEL error log format, Creator ID is hypervisor
- * But we can have various component ID to distinguish
- * which component in hypervisor is reporting the error
- * This is 2 bytes long,
- * first byte corresponds to Component IDs
- * Second byte is reserved for the Reason code.
- * Component ID is mapped to readable 4-digit ascii
- * character name in FSP and displayed.
- */
-/* SAPPHIRE components */
-#define OPAL_CODEUPDATE 0x4355 /* CU */
-#define OPAL_CONSOLE 0x434E /* CN */
-#define OPAL_CEC 0x4345 /* CE */
-#define OPAL_CHIP 0x4348 /* CH */
-#define OPAL_ELOG 0x454C /* EL */
-#define OPAL_NVRAM 0x4E56 /* NV */
-#define OPAL_RTC 0x5254 /* RT */
-#define OPAL_SURVEILLANCE 0x5355 /* SU */
-#define OPAL_SYSPARAM 0x5350 /* SP */
-#define OPAL_LPC 0x4C50 /* LP */
-#define OPAL_UART 0x5541 /* UA */
-#define OPAL_OCC 0x4F43 /* OC */
-#define OPAL_OP_PANEL 0x4F50 /* OP */
-#define OPAL_PHB3 0x5048 /* PH */
-#define OPAL_PSI 0x5053 /* PS */
-#define OPAL_VPD 0x5650 /* VP */
-#define OPAL_XSCOM 0x5853 /* XS */
-#define OPAL_PCI 0x5043 /* PC */
-#define OPAL_MISC 0x4D49 /* MI */
-#define OPAL_ATTN 0x4154 /* AT */
-#define OPAL_MEM_ERR 0x4D45 /* ME */
-#define OPAL_CENTAUR 0x4354 /* CT */
-#define OPAL_MFSI 0x4D46 /* MF */
-#define OPAL_DUMP 0x4455 /* DU */
-#define OPAL_LED 0x4C45 /* LE */
-#define OPAL_SENSOR 0x5345 /* SE */
-#define OPAL_SLW 0x534C /* SL */
-#define OPAL_FSP 0x4650 /* FP */
-#define OPAL_I2C 0x4943 /* IC */
-
-/* SAPPHIRE SRC componenet ID*/
-#define OPAL_CU 0x1000
-#define OPAL_CN 0x2000
-#define OPAL_CE 0x3000
-#define OPAL_CH 0x4000
-#define OPAL_EL 0x5000
-#define OPAL_NV 0x6000
-#define OPAL_RT 0x7000
-#define OPAL_SU 0x8000
-#define OPAL_SP 0x9000
-#define OPAL_LP 0xa000
-#define OPAL_UA 0xb000
-#define OPAL_OC 0xc000
-#define OPAL_OP 0xd000
-#define OPAL_PH 0xe000
-#define OPAL_PS 0xf000
-#define OPAL_VP 0x1000
-#define OPAL_XS 0x1100
-#define OPAL_PC 0x1200
-#define OPAL_MI 0x1300
-#define OPAL_AT 0x1400
-#define OPAL_ME 0x1500
-#define OPAL_CT 0x1600
-#define OPAL_MF 0x1700
-#define OPAL_DU 0x1800
-#define OPAL_LE 0x1900
-#define OPAL_SE 0x2000
-#define OPAL_SL 0x2100
-#define OPAL_FP 0x2200
-#define OPAL_IC 0x2300
-
-enum opal_reasoncode {
-/* code update */
- OPAL_RC_CU_FLASH = OPAL_CU | 0x10,
- OPAL_RC_CU_INIT = OPAL_CU | 0x11,
- OPAL_RC_CU_SG_LIST = OPAL_CU | 0x12,
- OPAL_RC_CU_COMMIT = OPAL_CU | 0x13,
- OPAL_RC_CU_MSG = OPAL_CU | 0x14,
- OPAL_RC_CU_NOTIFY = OPAL_CU | 0x15,
- OPAL_RC_CU_MARKER_LID = OPAL_CU | 0x16,
-/* NVRAM */
- OPAL_RC_NVRAM_INIT = OPAL_NV | 0x10,
- OPAL_RC_NVRAM_OPEN = OPAL_NV | 0x11,
- OPAL_RC_NVRAM_SIZE = OPAL_NV | 0x12,
- OPAL_RC_NVRAM_WRITE = OPAL_NV | 0x13,
- OPAL_RC_NVRAM_READ = OPAL_NV | 0x14,
-/* CENTAUR */
- OPAL_RC_CENTAUR_INIT = OPAL_CT | 0x10,
- OPAL_RC_CENTAUR_RW_ERR = OPAL_CT | 0x11,
-/* MFSI */
- OPAL_RC_MFSI_RW_ERR = OPAL_MF | 0x10,
-/* UART */
- OPAL_RC_UART_INIT = OPAL_UA | 0x10,
-/* OCC */
- OPAL_RC_OCC_RESET = OPAL_OC | 0x10,
- OPAL_RC_OCC_LOAD = OPAL_OC | 0x11,
- OPAL_RC_OCC_PSTATE_INIT = OPAL_OC | 0x12,
- OPAL_RC_OCC_TIMEOUT = OPAL_OC | 0x13,
-/* RTC */
- OPAL_RC_RTC_READ = OPAL_RT | 0x10,
- OPAL_RC_RTC_TOD = OPAL_RT | 0x11,
-/* SURVEILLANCE */
- OPAL_RC_SURVE_INIT = OPAL_SU | 0x10,
- OPAL_RC_SURVE_STATUS = OPAL_SU | 0x11,
- OPAL_RC_SURVE_ACK = OPAL_SU | 0x12,
-/* SYSPARAM */
- OPAL_RC_SYSPARM_INIT = OPAL_SP | 0x10,
- OPAL_RC_SYSPARM_MSG = OPAL_SP | 0x11,
-/* LPC */
- OPAL_RC_LPC_READ = OPAL_LP | 0x10,
- OPAL_RC_LPC_WRITE = OPAL_LP | 0x11,
-/* OP_PANEL */
- OPAL_RC_PANEL_WRITE = OPAL_OP | 0x10,
-/* PSI */
- OPAL_RC_PSI_INIT = OPAL_PS | 0x10,
- OPAL_RC_PSI_IRQ_RESET = OPAL_PS | 0x11,
-/* XSCOM */
- OPAL_RC_XSCOM_RW = OPAL_XS | 0x10,
- OPAL_RC_XSCOM_INDIRECT_RW = OPAL_XS | 0x11,
- OPAL_RC_XSCOM_RESET = OPAL_XS | 0x12,
-/* PCI */
- OPAL_RC_PCI_INIT_SLOT = OPAL_PC | 0x10,
- OPAL_RC_PCI_ADD_SLOT = OPAL_PC | 0x11,
- OPAL_RC_PCI_SCAN = OPAL_PC | 0x12,
- OPAL_RC_PCI_RESET_PHB = OPAL_PC | 0x10,
-/* ATTN */
- OPAL_RC_ATTN = OPAL_AT | 0x10,
-/* MEM_ERR */
- OPAL_RC_MEM_ERR_RES = OPAL_ME | 0x10,
- OPAL_RC_MEM_ERR_DEALLOC = OPAL_ME | 0x11,
-/* DUMP */
- OPAL_RC_DUMP_INIT = OPAL_DU | 0x10,
- OPAL_RC_DUMP_LIST = OPAL_DU | 0x11,
- OPAL_RC_DUMP_ACK = OPAL_DU | 0x12,
- OPAL_RC_DUMP_MDST_INIT = OPAL_DU | 0x13,
- OPAL_RC_DUMP_MDST_UPDATE= OPAL_DU | 0x14,
- OPAL_RC_DUMP_MDST_ADD = OPAL_DU | 0x15,
- OPAL_RC_DUMP_MDST_REMOVE= OPAL_DU | 0x16,
-/* LED */
- OPAL_RC_LED_SPCN = OPAL_LE | 0x10,
- OPAL_RC_LED_BUFF = OPAL_LE | 0x11,
- OPAL_RC_LED_LC = OPAL_LE | 0x12,
- OPAL_RC_LED_STATE = OPAL_LE | 0x13,
- OPAL_RC_LED_SUPPORT = OPAL_LE | 0x14,
-/* SENSOR */
- OPAL_RC_SENSOR_INIT = OPAL_SE | 0x10,
- OPAL_RC_SENSOR_READ = OPAL_SE | 0x11,
- OPAL_RC_SENSOR_ASYNC_COMPLETE
- = OPAL_SE | 0x12,
-/* SLW */
- OPAL_RC_SLW_INIT = OPAL_SL | 0x10,
- OPAL_RC_SLW_SET = OPAL_SL | 0x11,
- OPAL_RC_SLW_GET = OPAL_SL | 0x12,
- OPAL_RC_SLW_REG = OPAL_SL | 0x13,
-/* FSP */
- OPAL_RC_FSP_POLL_TIMEOUT
- = OPAL_FP | 0x10,
-/* I2C */
- OPAL_RC_I2C_INIT = OPAL_IC | 0X10,
- OPAL_RC_I2C_START_REQ = OPAL_IC | 0X11,
- OPAL_RC_I2C_TIMEOUT = OPAL_IC | 0x12,
- OPAL_RC_I2C_TRANSFER = OPAL_IC | 0x13,
- OPAL_RC_I2C_RESET = OPAL_IC | 0x14,
-};
-
-#define DEFINE_LOG_ENTRY(reason, type, id, subsys, \
-severity, subtype, callout_func) struct opal_err_info err_##reason = \
-{ .reason_code = reason, .err_type = type, .cmp_id = id, \
-.subsystem = subsys, .sev = severity, .event_subtype = subtype, \
-.call_out = callout_func }
-
/* Generate src from opal reason code (src_comp) */
#define generate_src_from_comp(src_comp) (OPAL_SRC_TYPE_ERROR << 24 | \
OPAL_FAILING_SUBSYSTEM << 16 | src_comp)
-#define e_info(reason_code) err_##reason_code
-
-struct errorlog *opal_elog_create(struct opal_err_info *e_info) __warn_unused_result;
-
-int opal_elog_update_user_dump(struct errorlog *buf, unsigned char *data,
- uint32_t tag, uint16_t size);
-
int elog_fsp_commit(struct errorlog *buf) __warn_unused_result;
bool opal_elog_info(uint64_t *opal_elog_id, uint64_t *opal_elog_size) __warn_unused_result;
@@ -229,12 +50,4 @@ bool opal_elog_ack(uint64_t ack_id) __warn_unused_result;
void opal_resend_pending_logs(void);
-/* This is wrapper around the error log function, which creates
- * and commits the error to FSP.
- * Used for simple error logging
- */
-void log_simple_error(struct opal_err_info *e_info, const char *fmt, ...) __attribute__ ((format (printf, 2, 3)));
-void log_error(struct opal_err_info *e_info, void *data, uint16_t size,
- const char *fmt, ...) __attribute__ ((format (printf, 4, 5)));
-
#endif /* __ELOG_H */