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authorVasant Hegde <hegdevasant@linux.vnet.ibm.com>2019-07-12 16:47:42 +0530
committerOliver O'Halloran <oohall@gmail.com>2019-08-15 17:52:35 +1000
commitf10e629c9a76939d59574c5fabbe5b6ccd22812d (patch)
tree10d54c68ba2c36164a69fbb1ac35ad933cec0ec9
parent0b667811f2d1748d4fd904ba1d84da7ed7987f2e (diff)
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mem-map: Setup memory for MDDT table
Each entry in MDST and MDDT takes 16 bytes. With 1K we can have upto 64 entries. This is sufficient to support OPAL MPIPL (memory preserving IPL). Presently OPAL reserves 2K memory for MDST table. Lets split this into two region of 1K for MDST and MDDT table. Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> [oliver: rebased] Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
-rw-r--r--include/mem-map.h8
-rw-r--r--skiboot.lds.S7
2 files changed, 11 insertions, 4 deletions
diff --git a/include/mem-map.h b/include/mem-map.h
index 4d06b64..e75bd4e 100644
--- a/include/mem-map.h
+++ b/include/mem-map.h
@@ -36,12 +36,16 @@
*/
#define PROCIN_OFF (SPIRA_OFF + 0x800)
-/* Initial MDST table like PROCIN, we need fixed addresses,
+/* Initial MDST and MDDT tables like PROCIN, we need fixed addresses,
* we leave a 2k gap for PROCIN
*/
#define MDST_TABLE_OFF (SPIRA_OFF + 0x1000)
+#define MDST_TABLE_SIZE 0x400
-/* Like MDST, we need fixed address for CPU control header.
+#define MDDT_TABLE_OFF (SPIRA_OFF + 0x1400)
+#define MDDT_TABLE_SIZE 0x400
+
+/* Like MDST and MDDT, we need fixed address for CPU control header.
* We leave a 2k gap for MDST. CPU_CTL table is of size ~4k
*/
#define CPU_CTL_OFF (SPIRA_OFF + 0x1800)
diff --git a/skiboot.lds.S b/skiboot.lds.S
index 477c06a..67c58b3 100644
--- a/skiboot.lds.S
+++ b/skiboot.lds.S
@@ -1,7 +1,5 @@
// SPDX-License-Identifier: Apache-2.0
/*
- * Skiboot linker script
- *
* Copyright 2013-2019 IBM Corp.
*/
@@ -81,6 +79,11 @@ SECTIONS
KEEP(*(.mdst.data))
}
+ . = MDDT_TABLE_OFF;
+ .mddt : {
+ KEEP(*(.mddt.data))
+ }
+
. = CPU_CTL_OFF;
.cpuctrl : {
KEEP(*(.cpuctrl.data))