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authorMichael Neuling <mikey@neuling.org>2017-05-02 13:23:12 +1000
committerStewart Smith <stewart@linux.vnet.ibm.com>2017-05-10 16:58:18 +1000
commitb3bb496134028f6b7748bf709f3ec48f9a7e2a3a (patch)
treecc2fc94f01234171d646ae8b5802c7628640ec35
parent8418561f06e8f0d5af36e2ac822a37f0af9b0051 (diff)
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phb4: Increase 64bit MMIO BAR size from 128GB to 256GB
Primarily for GPUs which may have large MMIO space for frame buffers. This shuffles the memory map around a bit and starts using the 2TB region. Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
-rw-r--r--hw/phys-map.c14
1 files changed, 7 insertions, 7 deletions
diff --git a/hw/phys-map.c b/hw/phys-map.c
index d1f895a..768f464 100644
--- a/hw/phys-map.c
+++ b/hw/phys-map.c
@@ -48,12 +48,9 @@ static const struct phys_map_entry phys_map_table_nimbus[] = {
{ GPU_MEM, 0, 0x000003e000000000ull, 0x0000002000000000ull },
/* 0 TB offset @ MMIO 0x0006000000000000ull */
- { PHB4_64BIT_MMIO, 0, 0x0006000000000000ull, 0x0000002000000000ull },
- { PHB4_64BIT_MMIO, 1, 0x0006002000000000ull, 0x0000002000000000ull },
- { PHB4_64BIT_MMIO, 2, 0x0006004000000000ull, 0x0000002000000000ull },
- { PHB4_64BIT_MMIO, 3, 0x0006006000000000ull, 0x0000002000000000ull },
- { PHB4_64BIT_MMIO, 4, 0x0006008000000000ull, 0x0000002000000000ull },
- { PHB4_64BIT_MMIO, 5, 0x000600a000000000ull, 0x0000002000000000ull },
+ { PHB4_64BIT_MMIO, 0, 0x0006000000000000ull, 0x0000004000000000ull },
+ { PHB4_64BIT_MMIO, 1, 0x0006004000000000ull, 0x0000004000000000ull },
+ { PHB4_64BIT_MMIO, 2, 0x0006008000000000ull, 0x0000004000000000ull },
{ PHB4_32BIT_MMIO, 0, 0x000600c000000000ull, 0x0000000080000000ull },
{ PHB4_32BIT_MMIO, 1, 0x000600c080000000ull, 0x0000000080000000ull },
{ PHB4_32BIT_MMIO, 2, 0x000600c100000000ull, 0x0000000080000000ull },
@@ -90,7 +87,10 @@ static const struct phys_map_entry phys_map_table_nimbus[] = {
{ RESV , 3, 0x0006019140000000ull, 0x0000006ec0000000ull },
/* 2 TB offset @ MMIO 0x0006000000000000ull */
- { RESV , 4, 0x0006020000000000ull, 0x0000010000000000ull },
+ { PHB4_64BIT_MMIO, 3, 0x0006020000000000ull, 0x0000004000000000ull },
+ { PHB4_64BIT_MMIO, 4, 0x0006024000000000ull, 0x0000004000000000ull },
+ { PHB4_64BIT_MMIO, 5, 0x0006028000000000ull, 0x0000004000000000ull },
+ { RESV , 4, 0x000602c000000000ull, 0x0000004000000000ull },
/* 3 TB offset @ MMIO 0x0006000000000000ull */
{ LPC_BUS , 0, 0x0006030000000000ull, 0x0000000100000000ull },