diff options
author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2016-06-25 08:47:29 +1000 |
---|---|---|
committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2016-07-06 19:30:48 +1000 |
commit | a467a5ce1f1f706f4136a1cbe23ab9015db506cf (patch) | |
tree | 1e2c2790431e6a795ab86c12c74e6866c34a698c | |
parent | 1a7635354e5c0bdb684f2cfb36fe13adb75186c1 (diff) | |
download | skiboot-a467a5ce1f1f706f4136a1cbe23ab9015db506cf.zip skiboot-a467a5ce1f1f706f4136a1cbe23ab9015db506cf.tar.gz skiboot-a467a5ce1f1f706f4136a1cbe23ab9015db506cf.tar.bz2 |
chip: Add more P9 accessors for converting to/from PIR
To access a local CPU number within a chip essentially, will be
used by XIVE
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
-rw-r--r-- | include/chip.h | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/include/chip.h b/include/chip.h index 463cce3..0038814 100644 --- a/include/chip.h +++ b/include/chip.h @@ -87,7 +87,10 @@ * | | | * |___|___|___|___|___|___|___| * - * Bit 56 is unused according to the manual by we add it to the coreid here. + * Bit 56 is unused according to the manual by we add it to the coreid here, + * thus we have a 6-bit core number. + * + * Note: XIVE Only supports 4-bit chip numbers ... */ #define P9_PIR2GCID(pir) (((pir) >> 8) & 0x7f) @@ -95,6 +98,11 @@ #define P9_PIR2THREADID(pir) ((pir) & 0x3) +/* P9 specific ones mostly used by XIVE */ +#define P9_PIR2LOCALCPU(pir) ((pir) & 0xff) +#define P9_PIRFROMLOCALCPU(chip, cpu) (((chip) << 8) | (cpu)) + + struct dt_node; struct centaur_chip; struct mfsi; |