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author | Vaibhav Jain <vaibhav@linux.vnet.ibm.com> | 2018-03-02 16:42:19 +0530 |
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committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2018-03-06 18:33:47 -0600 |
commit | a72d055d93378e934df38a4bb1787e427fbf21cf (patch) | |
tree | 7a7e0ebf741a7bbb0f156eda4d5f83a24c42650b | |
parent | 48dd5f7b9fbba52f08cd991d3443748dd810a99b (diff) | |
download | skiboot-a72d055d93378e934df38a4bb1787e427fbf21cf.zip skiboot-a72d055d93378e934df38a4bb1787e427fbf21cf.tar.gz skiboot-a72d055d93378e934df38a4bb1787e427fbf21cf.tar.bz2 |
capp: Make error in capp timebase sync a non-fatal error
Presently when we encounter an error while synchronizing capp timebase
with chip-tod at the end of enable_capi_mode() we return an
error. This has an to unintended consequences. First this will prevent
disabling of fast-reboot even though CAPP is already enabled by this
point. Secondly, failure during timebase sync is a non fatal error or
capp initialization as CAPP/PSL can continue working after this and an
AFU will only see an error when it tries to read the timebase value
from PSL.
So this patch updates enable_capi_mode() to not return an error in
case call to chiptod_capp_timebase_sync() fails. The function will now
just log an error and continue further with capp init sequence. This
make the current implementation align with the one in kernel 'cxl'
driver which also assumes the PSL timebase sync errors as non-fatal
init error.
Signed-off-by: Vaibhav Jain <vaibhav@linux.vnet.ibm.com>
Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
-rw-r--r-- | hw/phb4.c | 4 |
1 files changed, 1 insertions, 3 deletions
@@ -4019,10 +4019,8 @@ static int64_t enable_capi_mode(struct phb4 *p, uint64_t pe_number, if (!chiptod_capp_timebase_sync(p->chip_id, CAPP_TFMR, CAPP_TB, - PHB4_CAPP_REG_OFFSET(p))) { + PHB4_CAPP_REG_OFFSET(p))) PHBERR(p, "CAPP: Failed to sync timebase\n"); - return OPAL_HARDWARE; - } /* set callbacks to handle HMI events */ capi_ops.get_capp_info = &phb4_get_capp_info; |