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author | Joel Stanley <joel@jms.id.au> | 2018-06-05 16:43:37 +0930 |
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committer | Stewart Smith <stewart@linux.ibm.com> | 2018-06-18 22:13:43 -0500 |
commit | b2054c43315dff703b41de4e6536986d1fcf0030 (patch) | |
tree | 8165a6409fea1191b58a64b5018e6a280c3ecb9e | |
parent | c3f20185ff5d7359e08a4e7e90252f1fe3abb27d (diff) | |
download | skiboot-b2054c43315dff703b41de4e6536986d1fcf0030.zip skiboot-b2054c43315dff703b41de4e6536986d1fcf0030.tar.gz skiboot-b2054c43315dff703b41de4e6536986d1fcf0030.tar.bz2 |
psi: Properly mask errors in SEMR
It looks like this code intended to read PSIHB SEMR, mask out some of
the values, and write it back. Instead it writes the mask to the
register.
Found using scan-build.
Fixes: 39addc6a0f1f ("PSI: Reorganize PSI link down handling code")
Signed-off-by: Joel Stanley <joel@jms.id.au>
Acked-by: Ananth N Mavinakayanahalli <ananth@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
-rw-r--r-- | hw/psi.c | 2 |
1 files changed, 1 insertions, 1 deletions
@@ -74,7 +74,7 @@ void psi_disable_link(struct psi *psi) /* Mask errors in SEMR */ reg = in_be64(psi->regs + PSIHB_SEMR); - reg = ((0xfffull << 36) | (0xfffull << 20)); + reg &= ((0xfffull << 36) | (0xfffull << 20)); out_be64(psi->regs + PSIHB_SEMR, reg); printf("PSI: SEMR set to %llx\n", reg); |