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authorStewart Smith <stewart@linux.ibm.com>2018-07-17 05:20:05 -0500
committerStewart Smith <stewart@linux.ibm.com>2018-10-31 16:49:21 +1100
commite0959fa0481578e30b02d310e16ef13021a9f42e (patch)
tree5b706bcfc230498bf4cadb2da1f510fcadce303a
parente9accca5570e1614634b0b01fafaf02f78e0a4db (diff)
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Fixup pflash build for ast refactor
[ Upstream commit f651e8eb56e2c17aeac58fd50c20f874d874169c ] Fixes: 5b1bc2ffe791ae94361d86b2ae063ee543bf2df5 Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
-rw-r--r--external/common/rules.mk5
-rw-r--r--hw/ast-bmc/ast-sf-ctrl.c10
2 files changed, 13 insertions, 2 deletions
diff --git a/external/common/rules.mk b/external/common/rules.mk
index 8c5749b..af8958b 100644
--- a/external/common/rules.mk
+++ b/external/common/rules.mk
@@ -49,7 +49,7 @@ ARCH_OBJS := $(addprefix common-,$(ARCH_FILES:.c=.o))
# Arch links are like this so we can have dependencies work (so that we don't
# run the rule when the links exist), pretty build output (knowing the target
# name) and a list of the files so we can clean them up.
-ARCH_LINKS ?= common/ast-sf-ctrl.c common/ast.h common/io.h
+ARCH_LINKS ?= common/ast-sf-ctrl.c common/ast.h common/io.h common/lpc.h
arch_links: $(ARCH_LINKS)
common/ast.h : ../../include/ast.h | common
@@ -61,6 +61,9 @@ common/io.h : ../common/arch_flash_$(arch)_io.h | common
common/ast-sf-ctrl.c : ../../hw/ast-bmc/ast-sf-ctrl.c | common
$(Q_LN)ln -sf ../../hw/ast-bmc/ast-sf-ctrl.c common/ast-sf-ctrl.c
+common/lpc.h: ../../include/lpc.h | common
+ $(Q_LN)ln -sf ../../include/lpc.h common/lpc.h
+
.PHONY: arch_clean
arch_clean:
rm -rf $(ARCH_OBJS) $(ARCH_LINKS)
diff --git a/hw/ast-bmc/ast-sf-ctrl.c b/hw/ast-bmc/ast-sf-ctrl.c
index e8c1fe1..32fc63a 100644
--- a/hw/ast-bmc/ast-sf-ctrl.c
+++ b/hw/ast-bmc/ast-sf-ctrl.c
@@ -22,7 +22,9 @@
#include <libflash/libflash.h>
#include <libflash/libflash-priv.h>
-#include <lpc.h>
+#ifdef __SKIBOOT__
+#include "lpc.h"
+#endif
#include "ast.h"
@@ -69,6 +71,7 @@ static const uint32_t ast_ct_hclk_divs[] = {
0xd, /* HCLK/5 */
};
+#ifdef __SKIBOOT__
#define PNOR_AHB_ADDR 0x30000000
static uint32_t pnor_lpc_offset;
@@ -152,6 +155,7 @@ static int ast_copy_from_ahb(void *dst, uint32_t reg, uint32_t len)
prerror("AST_IO: Attempted read bytes access to %08x\n", reg);
return -EINVAL;
}
+#endif /* __SKIBOOT__ */
static int ast_sf_start_cmd(struct ast_sf_ctrl *ct, uint8_t cmd)
{
@@ -942,7 +946,9 @@ static int ast_mem_erase(struct spi_flash_ctrl *ctrl, uint32_t addr, uint32_t si
int ast_sf_open(uint8_t type, struct spi_flash_ctrl **ctrl)
{
struct ast_sf_ctrl *ct;
+#ifdef __SKIBOOT__
uint32_t hicr7;
+#endif /* __SKIBOOT__ */
if (type != AST_SF_TYPE_PNOR && type != AST_SF_TYPE_BMC
&& type != AST_SF_TYPE_MEM)
@@ -985,6 +991,7 @@ int ast_sf_open(uint8_t type, struct spi_flash_ctrl **ctrl)
goto fail;
}
+#ifdef __SKIBOOT__
/* Read the configuration of the LPC->AHB bridge for PNOR
* to extract the PNOR LPC offset which can be different
* depending on flash size
@@ -992,6 +999,7 @@ int ast_sf_open(uint8_t type, struct spi_flash_ctrl **ctrl)
hicr7 = ast_ahb_readl(LPC_HICR7);
pnor_lpc_offset = (hicr7 & 0xffffu) << 16;
prlog(PR_DEBUG, "AST: PNOR LPC offset: 0x%08x\n", pnor_lpc_offset);
+#endif /* __SKIBOOT__ */
*ctrl = &ct->ops;