diff options
| author | Prem Shanker Jha <premjha2@in.ibm.com> | 2017-12-14 09:57:58 +1100 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2017-12-13 22:25:33 -0600 |
| commit | 35ef8e112113e2e62ef57b6bbf5179622ca8398e (patch) | |
| tree | e1a3dbc2d0a98afda61a5698296c14e7211731ca | |
| parent | 1082d686f63191d3690508fd5a72b39a97b21f41 (diff) | |
| download | skiboot-35ef8e112113e2e62ef57b6bbf5179622ca8398e.zip skiboot-35ef8e112113e2e62ef57b6bbf5179622ca8398e.tar.gz skiboot-35ef8e112113e2e62ef57b6bbf5179622ca8398e.tar.bz2 | |
SCOM Restore: Increased the EQ SCOM restore limit.
Commit increases the SCOM restore limit from 16 to 31.
HW-Image-Prereq: I781b0862dc983001574ba5f09a84ea0a2f7f781f
HW-ImageBuild-Prereq: I43e7e067b59513db1c99ce913009a9a3ef5de90b
CQ:HW423686
Change-Id: Ied6c919ff88870cd71319854a2b6aebbcc591af1
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49055
Dev-Ready: Gregory S. Still <stillgs@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
(cherry picked from hostboot https://ralgit01.raleigh.ibm.com/gerrit1/#/c/49059/ )
[stewart: I am told that this is a safe thing to cherry-pick now,
even before it hits hostboot master, as hostboot and HCODE have a
dependency]
CC: stable
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
(cherry picked from commit 43c966bdad4613de1fb41093edc4ddaa41b7211f)
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
| -rw-r--r-- | libpore/p9_hcd_memmap_base.H | 17 |
1 files changed, 16 insertions, 1 deletions
diff --git a/libpore/p9_hcd_memmap_base.H b/libpore/p9_hcd_memmap_base.H index 852692b..7073841 100644 --- a/libpore/p9_hcd_memmap_base.H +++ b/libpore/p9_hcd_memmap_base.H @@ -261,7 +261,22 @@ HCD_CONST(QUAD_SCOM_RESTORE_HOMER_OFFSET, HCD_CONST(MAX_L2_SCOM_ENTRIES, 16) HCD_CONST(MAX_L3_SCOM_ENTRIES, 16) -HCD_CONST(MAX_EQ_SCOM_ENTRIES, 15) + +//HW423686 +//Inorder to continue IMA after STOP11 on all four cores of a quad, 2 +//EQ SCOM registers need to restored per core. STOP API desgin allowed +//only 15 SCOM restore entries per EQ. Out of total budget, 12 are +//consumed during IPL. Hence it was not possible to manage IMA within +//this limit. As a resolution, limit for EQ SCOM restore entries has +//been changed to 31. Below is the break down for EQ SCOM Restore +//Entries + +// Power Management 12 +// Core IMA 08 +// PRD FIR Mask 05 +// Reserve 06 + +HCD_CONST(MAX_EQ_SCOM_ENTRIES, 31) HCD_CONST(QUAD_SCOM_RESTORE_REGS_PER_QUAD, (MAX_EQ_SCOM_ENTRIES + MAX_L2_SCOM_ENTRIES + MAX_L3_SCOM_ENTRIES + 1)) |