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| author | Michael Neuling <mikey@neuling.org> | 2017-11-14 22:23:05 +1100 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2017-11-15 02:29:38 -0600 |
| commit | 5b71bec7183667c3c81c6ef98b43041d676fbb9b (patch) | |
| tree | bb260ab6d0d97416c271195918890da3eee5903a | |
| parent | 6dd34d9592a27116b68175eebf6b0f0891f8bb02 (diff) | |
| download | skiboot-5b71bec7183667c3c81c6ef98b43041d676fbb9b.zip skiboot-5b71bec7183667c3c81c6ef98b43041d676fbb9b.tar.gz skiboot-5b71bec7183667c3c81c6ef98b43041d676fbb9b.tar.bz2 | |
phys-map: Rename GPU_MEM to GPU_MEM_4T_DOWN
This map is soon to be replaced, but we are going to keep it around
for a little while so that we support older hostboot firmware.
Rename it for now.
Signed-off-by: Michael Neuling <mikey@neuling.org>
Reviewed-by: Balbir Singh <bsingharora@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
(cherry picked from commit 74d9a50ac2a79d39b07bbe7d7e0bbb72f7f5b026)
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
| -rw-r--r-- | hw/npu2.c | 8 | ||||
| -rw-r--r-- | hw/phys-map.c | 14 | ||||
| -rw-r--r-- | include/phys-map.h | 2 |
3 files changed, 12 insertions, 12 deletions
@@ -607,7 +607,7 @@ static void npu2_get_gpu_base(struct npu2_dev *ndev, uint64_t *addr, uint64_t *s int group; group = (ndev->bdfn >> 3) & 0x1f; - phys_map_get(ndev->npu->chip_id, GPU_MEM, group, addr, size); + phys_map_get(ndev->npu->chip_id, GPU_MEM_4T_DOWN, group, addr, size); } static void npu2_dn_fixup_gmb(struct dt_node *pd_dn, struct npu2_dev *ndev) @@ -866,16 +866,16 @@ static void npu2_mcd_init(struct npu2 *p) uint64_t size, addr, gpu_min_addr, gpu_max_addr, total_size; /* Init memory cache directory (MCD) registers. */ - phys_map_get(p->chip_id, GPU_MEM, NPU2_LINKS_PER_CHIP - 1, + phys_map_get(p->chip_id, GPU_MEM_4T_DOWN, NPU2_LINKS_PER_CHIP - 1, &gpu_min_addr, NULL); - phys_map_get(p->chip_id, GPU_MEM, 0, &gpu_max_addr, &size); + phys_map_get(p->chip_id, GPU_MEM_4T_DOWN, 0, &gpu_max_addr, &size); gpu_max_addr += size; /* We assume GPU memory is contiguous from the first possible GPU to the * last and that the size is the same so best to check that. */ for (i = 0; i < NPU2_LINKS_PER_CHIP; i++) { uint64_t tmp; - phys_map_get(p->chip_id, GPU_MEM, i, &addr, &tmp); + phys_map_get(p->chip_id, GPU_MEM_4T_DOWN, i, &addr, &tmp); assert((addr >= gpu_min_addr) && (addr + tmp <= gpu_max_addr)); assert(tmp == size); } diff --git a/hw/phys-map.c b/hw/phys-map.c index 8cccbf0..02bc33b 100644 --- a/hw/phys-map.c +++ b/hw/phys-map.c @@ -37,15 +37,15 @@ static const struct phys_map_info *phys_map; static const struct phys_map_entry phys_map_table_nimbus[] = { - /* System memory u pto 4TB minus GPU memory */ + /* System memory upto 4TB minus GPU memory */ { SYSTEM_MEM, 0, 0x0000000000000000ull, 0x0000034000000000ull }, /* GPU memory from 4TB - 128GB*GPU */ - { GPU_MEM, 5, 0x0000034000000000ull, 0x0000002000000000ull }, - { GPU_MEM, 4, 0x0000036000000000ull, 0x0000002000000000ull }, - { GPU_MEM, 3, 0x0000038000000000ull, 0x0000002000000000ull }, - { GPU_MEM, 2, 0x000003a000000000ull, 0x0000002000000000ull }, - { GPU_MEM, 1, 0x000003c000000000ull, 0x0000002000000000ull }, - { GPU_MEM, 0, 0x000003e000000000ull, 0x0000002000000000ull }, + { GPU_MEM_4T_DOWN, 5, 0x0000034000000000ull, 0x0000002000000000ull }, + { GPU_MEM_4T_DOWN, 4, 0x0000036000000000ull, 0x0000002000000000ull }, + { GPU_MEM_4T_DOWN, 3, 0x0000038000000000ull, 0x0000002000000000ull }, + { GPU_MEM_4T_DOWN, 2, 0x000003a000000000ull, 0x0000002000000000ull }, + { GPU_MEM_4T_DOWN, 1, 0x000003c000000000ull, 0x0000002000000000ull }, + { GPU_MEM_4T_DOWN, 0, 0x000003e000000000ull, 0x0000002000000000ull }, /* 0 TB offset @ MMIO 0x0006000000000000ull */ { PHB4_64BIT_MMIO, 0, 0x0006000000000000ull, 0x0000004000000000ull }, diff --git a/include/phys-map.h b/include/phys-map.h index 3621bfd..c9b2389 100644 --- a/include/phys-map.h +++ b/include/phys-map.h @@ -26,7 +26,7 @@ enum phys_map_type { NULL_MAP, SYSTEM_MEM, - GPU_MEM, + GPU_MEM_4T_DOWN, PHB4_64BIT_MMIO, PHB4_32BIT_MMIO, PHB4_XIVE_ESB, |