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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2017-06-24 14:17:15 -0500
committerStewart Smith <stewart@linux.vnet.ibm.com>2017-06-26 14:28:58 +1000
commitb0db1d7883094adb0fc51a7920075ca3d866d2c7 (patch)
treea2a9864199e2732585639372ecf7bacfa33fa499
parent0fe0b6f2c4bac4acffc568e3250c3a7b4144367f (diff)
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lpc: Enable "new" SerIRQ mode
So we don't have to clear the bits on EOI manually. This works in conjunction with the DD2 test in psi.c Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
-rw-r--r--hw/lpc.c10
1 files changed, 9 insertions, 1 deletions
diff --git a/hw/lpc.c b/hw/lpc.c
index 6bba61e..b5fbc6c 100644
--- a/hw/lpc.c
+++ b/hw/lpc.c
@@ -94,6 +94,7 @@ DEFINE_LOG_ENTRY(OPAL_RC_LPC_SYNC_PERF, OPAL_PLATFORM_ERR_EVT, OPAL_LPC,
#define LPC_HC_IRQSER_START_4CLK 0x00000000
#define LPC_HC_IRQSER_START_6CLK 0x01000000
#define LPC_HC_IRQSER_START_8CLK 0x02000000
+#define LPC_HC_IRQSER_AUTO_CLEAR 0x00800000
#define LPC_HC_IRQMASK 0x34 /* same bit defs as LPC_HC_IRQSTAT */
#define LPC_HC_IRQSTAT 0x38
#define LPC_HC_IRQ_SERIRQ0 0x80000000u /* all bits down to ... */
@@ -621,7 +622,14 @@ static void lpc_setup_serirq(struct lpcm *lpc)
/* Check whether we should enable serirq */
if (mask & LPC_HC_IRQ_SERIRQ_ALL) {
rc = opb_write(lpc, lpc_reg_opb_base + LPC_HC_IRQSER_CTRL,
- LPC_HC_IRQSER_EN | LPC_HC_IRQSER_START_4CLK, 4);
+ LPC_HC_IRQSER_EN |
+ LPC_HC_IRQSER_START_4CLK |
+ /*
+ * New mode bit for P9N DD2.0 (ignored otherwise)
+ * when set we no longer have to manually clear
+ * the SerIRQs on EOI.
+ */
+ LPC_HC_IRQSER_AUTO_CLEAR, 4);
DBG_IRQ("LPC: SerIRQ enabled\n");
} else {
rc = opb_write(lpc, lpc_reg_opb_base + LPC_HC_IRQSER_CTRL,