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| author | Michael Neuling <mikey@neuling.org> | 2017-07-20 16:22:16 +1000 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2017-07-25 15:42:30 +1000 |
| commit | b42ff2b904165addf32e77679cebb94a08086966 (patch) | |
| tree | 5f455df82fe4f3946eee7080e299de1048ad6815 | |
| parent | 47b647235345f9a9429bf4a9b3925c6f96443e99 (diff) | |
| download | skiboot-b42ff2b904165addf32e77679cebb94a08086966.zip skiboot-b42ff2b904165addf32e77679cebb94a08086966.tar.gz skiboot-b42ff2b904165addf32e77679cebb94a08086966.tar.bz2 | |
phb4: Read PERST signal rather than assuming it's asserted
Currently we assume on boot that PERST is asserted so that we can skip
having to assert it ourselves.
This instead reads the PERST status and determines if we need to
assert it based on that.
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
| -rw-r--r-- | hw/phb4.c | 6 |
1 files changed, 3 insertions, 3 deletions
@@ -2338,9 +2338,9 @@ static int64_t phb4_freset(struct pci_slot *slot) slot->ops.prepare_link_change(slot, false); /* fall through */ case PHB4_SLOT_FRESET_START: - if (!p->skip_perst) { + reg = in_be64(p->regs + PHB_PCIE_CRESET); + if ((reg & PHB_PCIE_CRESET_PERST_N) != 0) { PHBDBG(p, "FRESET: Assert\n"); - reg = in_be64(p->regs + PHB_PCIE_CRESET); reg &= ~PHB_PCIE_CRESET_PERST_N; out_be64(p->regs + PHB_PCIE_CRESET, reg); pci_slot_set_state(slot, @@ -2348,7 +2348,7 @@ static int64_t phb4_freset(struct pci_slot *slot) return pci_slot_set_sm_timeout(slot, secs_to_tb(1)); } - /* To skip the assert during boot time */ + /* To skip perst assert if already asserted (ie. boot time) */ PHBDBG(p, "FRESET: Assert skipped\n"); pci_slot_set_state(slot, PHB4_SLOT_FRESET_ASSERT_DELAY); p->skip_perst = false; |