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| author | Michael Neuling <mikey@neuling.org> | 2017-10-23 21:22:17 +1100 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2017-10-23 12:37:52 -0500 |
| commit | de00950c6fa89f8e42bf96c88615e90a69f10381 (patch) | |
| tree | 3ffc499a927719a9abe7cbb168dbf542ddaeff01 | |
| parent | a4c2d2fd5ba23712fb1fc9ce69f80b670c30c11e (diff) | |
| download | skiboot-de00950c6fa89f8e42bf96c88615e90a69f10381.zip skiboot-de00950c6fa89f8e42bf96c88615e90a69f10381.tar.gz skiboot-de00950c6fa89f8e42bf96c88615e90a69f10381.tar.bz2 | |
phb4: Improve config space logging
Log root complex accesses and print BFDN on device access
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
| -rw-r--r-- | hw/phb4.c | 21 |
1 files changed, 14 insertions, 7 deletions
@@ -324,13 +324,19 @@ static int64_t phb4_rc_read(struct phb4 *p, uint32_t offset, uint8_t sz, case 1: offset &= 3; *((uint8_t *)data) = (oval >> (offset << 3)) & 0xff; + PHBLOGCFG(p, "000 CFG08 Rd %02x=%02x\n", + offset, *((uint8_t *)data)); break; case 2: offset &= 2; *((uint16_t *)data) = (oval >> (offset << 3)) & 0xffff; + PHBLOGCFG(p, "000 CFG16 Rd %02x=%04x\n", + offset, *((uint16_t *)data)); break; case 4: *((uint32_t *)data) = oval; + PHBLOGCFG(p, "000 CFG32 Rd %02x=%08x\n", + offset, *((uint32_t *)data)); break; default: assert(false); @@ -417,6 +423,7 @@ static int64_t phb4_rc_write(struct phb4 *p, uint32_t offset, uint8_t sz, /* Workaround PHB config space enable */ if ((p->rev == PHB4_REV_NIMBUS_DD10) && (reg == PCI_CFG_CMD)) val |= PCI_CFG_CMD_MEM_EN | PCI_CFG_CMD_BUS_MASTER_EN; + PHBLOGCFG(p, "000 CFG%02d Wr %02x=%08x\n", 8 * sz, reg, val); if (use_asb) phb4_write_reg_asb(p, PHB_RC_CONFIG_BASE + reg, val); else @@ -485,19 +492,19 @@ static int64_t phb4_pcicfg_read(struct phb4 *p, uint32_t bdfn, case 1: *((uint8_t *)data) = in_8(p->regs + PHB_CONFIG_DATA + (offset & 3)); - PHBLOGCFG(p, "CFG8 Rd %02x=%02x\n", - offset, *((uint8_t *)data)); + PHBLOGCFG(p, "%03x CFG08 Rd %02x=%02x\n", + bdfn, offset, *((uint8_t *)data)); break; case 2: *((uint16_t *)data) = in_le16(p->regs + PHB_CONFIG_DATA + (offset & 2)); - PHBLOGCFG(p, "CFG16 Rd %02x=%04x\n", - offset, *((uint16_t *)data)); + PHBLOGCFG(p, "%03x CFG16 Rd %02x=%04x\n", + bdfn, offset, *((uint16_t *)data)); break; case 4: *((uint32_t *)data) = in_le32(p->regs + PHB_CONFIG_DATA); - PHBLOGCFG(p, "CFG32 Rd %02x=%08x\n", - offset, *((uint32_t *)data)); + PHBLOGCFG(p, "%03x CFG32 Rd %02x=%08x\n", + bdfn, offset, *((uint32_t *)data)); break; default: return OPAL_PARAMETER; @@ -574,7 +581,7 @@ static int64_t phb4_pcicfg_write(struct phb4 *p, uint32_t bdfn, return OPAL_PARAMETER; } } - PHBLOGCFG(p, "CFG%d Wr %02x=%08x\n", 8 * size, offset, data); + PHBLOGCFG(p, "%03x CFG%d Wr %02x=%08x\n", bdfn, 8 * size, offset, data); return OPAL_SUCCESS; } |