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author | Stewart Smith <stewart@linux.vnet.ibm.com> | 2018-03-23 14:29:02 -0700 |
---|---|---|
committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2018-03-27 22:06:33 -0500 |
commit | 97f645b528cf954942f473971cfdb617efa2c695 (patch) | |
tree | a9b565612bae17977a10f7b950e95beb22af7865 | |
parent | 4bf0117894d784a9edea38e4626908838ee228b9 (diff) | |
download | skiboot-97f645b528cf954942f473971cfdb617efa2c695.zip skiboot-97f645b528cf954942f473971cfdb617efa2c695.tar.gz skiboot-97f645b528cf954942f473971cfdb617efa2c695.tar.bz2 |
Revert "NPU2 HMIs: dump out a *LOT* of npu2 registers for debugging"
This reverts commit fbdc91e693fc3103f7e2a65054ed32bfb26a2e17.
We don't need this as we need to do it a different way, with a explicit
set of registers as otherwise we trip other random FIR bits and everything
becomes even more terrible.
I suggest alcohol.
Cc: stable
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
(cherry picked from commit 80452d2cf2ce4dfc769b74c28bd0c73ec076b9be)
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
-rw-r--r-- | core/hmi.c | 38 | ||||
-rw-r--r-- | hw/slw.c | 4 | ||||
-rw-r--r-- | hw/xscom.c | 36 | ||||
-rw-r--r-- | include/npu2-regs.h | 7 | ||||
-rw-r--r-- | include/xscom.h | 4 |
5 files changed, 20 insertions, 69 deletions
@@ -1,4 +1,4 @@ -/* Copyright 2013-2018 IBM Corp. +/* Copyright 2013-2014 IBM Corp. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -29,7 +29,6 @@ #include <npu2-regs.h> #include <npu.h> #include <capp.h> -#include <nvram.h> /* * HMER register layout: @@ -545,10 +544,7 @@ static void find_npu2_checkstop_reason(int flat_chip_id, uint64_t npu2_fir_action0_addr; uint64_t npu2_fir_action1_addr; uint64_t fatal_errors; - uint64_t npu_scom_dump[2]; - bool npu2_hmi_verbose; int total_errors = 0; - uint64_t r; /* Find the NPU on the chip associated with the HMI. */ for_each_phb(phb) { @@ -600,38 +596,6 @@ static void find_npu2_checkstop_reason(int flat_chip_id, if (!total_errors) return; - npu2_hmi_verbose = nvram_query_eq("npu2-hmi-verbose", "true"); - /* Force this for now until we sort out something better */ - npu2_hmi_verbose = true; - - if (npu2_hmi_verbose) { - _xscom_lock(); - for (r = NPU2_DEBUG_REG_START; r < NPU2_DEBUG_REG_END; r++) { - npu_scom_dump[0] = npu_scom_dump[1] = 0; - _xscom_read(flat_chip_id, r++, &npu_scom_dump[0], false, true); - _xscom_read(flat_chip_id, r, &npu_scom_dump[1], false, true); - prlog(PR_ERR, "NPU: 0x%016llx=0x%016llx 0x%016llx=0x%016llx\n", - r-1, npu_scom_dump[0], - r, npu_scom_dump[1]); - } - for (r = NPU2_FIR_REGISTER_0; r < NPU2_FIR_REGISTER_END; r++) { - npu_scom_dump[0] = npu_scom_dump[1] = 0; - _xscom_read(flat_chip_id, r++, &npu_scom_dump[0], false, true); - _xscom_read(flat_chip_id, r, &npu_scom_dump[1], false, true); - prlog(PR_ERR, "NPU: 0x%016llx=0x%016llx 0x%016llx=0x%016llx\n", - r-1, npu_scom_dump[0], - r, npu_scom_dump[1]); - } - _xscom_unlock(); - prlog(PR_ERR, " _________________________ \n"); - prlog(PR_ERR, "< It's Driver Debug time! >\n"); - prlog(PR_ERR, " ------------------------- \n"); - prlog(PR_ERR, " \\ ,__, \n"); - prlog(PR_ERR, " \\ (oo)____ \n"); - prlog(PR_ERR, " (__) )\\ \n"); - prlog(PR_ERR, " ||--|| * \n"); - } - /* Set up the HMI event */ hmi_evt->severity = OpalHMI_SEV_WARNING; hmi_evt->type = OpalHMI_ERROR_MALFUNC_ALERT; @@ -1620,7 +1620,7 @@ void slw_update_timer_expiry(uint64_t new_target) /* Grab generation and spin if odd */ _xscom_lock(); for (;;) { - rc = _xscom_read(slw_timer_chip, 0xE0006, &gen, false, false); + rc = _xscom_read(slw_timer_chip, 0xE0006, &gen, false); if (rc) { prerror("SLW: Error %lld reading tmr gen " " count\n", rc); @@ -1664,7 +1664,7 @@ void slw_update_timer_expiry(uint64_t new_target) } /* Re-check gen count */ - rc = _xscom_read(slw_timer_chip, 0xE0006, &gen2, false, false); + rc = _xscom_read(slw_timer_chip, 0xE0006, &gen2, false); if (rc) { prerror("SLW: Error %lld re-reading tmr gen " " count\n", rc); @@ -215,9 +215,8 @@ static int xscom_clear_error(uint32_t gcid, uint32_t pcb_addr) } static int64_t xscom_handle_error(uint64_t hmer, uint32_t gcid, uint32_t pcb_addr, - bool is_write, int64_t retries, - int64_t *xscom_clear_retries, - bool ignore_error) + bool is_write, int64_t retries, + int64_t *xscom_clear_retries) { unsigned int stat = GETFIELD(SPR_HMER_XSCOM_STATUS, hmer); int64_t rc = OPAL_HARDWARE; @@ -278,12 +277,9 @@ static int64_t xscom_handle_error(uint64_t hmer, uint32_t gcid, uint32_t pcb_add } /* XXX: Create error log entry ? */ - if (!ignore_error) - log_simple_error(&e_info(OPAL_RC_XSCOM_RW), - "XSCOM: %s error gcid=0x%x " - "pcb_addr=0x%x stat=0x%x\n", - is_write ? "write" : "read", gcid, - pcb_addr, stat); + log_simple_error(&e_info(OPAL_RC_XSCOM_RW), + "XSCOM: %s error gcid=0x%x pcb_addr=0x%x stat=0x%x\n", + is_write ? "write" : "read", gcid, pcb_addr, stat); /* We need to reset the XSCOM or we'll hang on the next access */ xscom_reset(gcid, false); @@ -326,16 +322,14 @@ static inline bool xscom_is_multicast_addr(uint32_t addr) * Low level XSCOM access functions, perform a single direct xscom * access via MMIO */ -static int __xscom_read(uint32_t gcid, uint32_t pcb_addr, uint64_t *val, - bool ignore_error) +static int __xscom_read(uint32_t gcid, uint32_t pcb_addr, uint64_t *val) { uint64_t hmer; int64_t ret, retries; int64_t xscom_clear_retries = XSCOM_CLEAR_MAX_RETRIES; if (!xscom_gcid_ok(gcid)) { - if (!ignore_error) - prerror("%s: invalid XSCOM gcid 0x%x\n", __func__, gcid); + prerror("%s: invalid XSCOM gcid 0x%x\n", __func__, gcid); return OPAL_PARAMETER; } @@ -357,7 +351,7 @@ static int __xscom_read(uint32_t gcid, uint32_t pcb_addr, uint64_t *val, /* Handle error and possibly eventually retry */ ret = xscom_handle_error(hmer, gcid, pcb_addr, false, retries, - &xscom_clear_retries, ignore_error); + &xscom_clear_retries); if (ret != OPAL_BUSY) break; } @@ -376,8 +370,7 @@ static int __xscom_read(uint32_t gcid, uint32_t pcb_addr, uint64_t *val, if (proc_gen == proc_gen_p9 && ret == OPAL_XSCOM_CHIPLET_OFF) return ret; - if (!ignore_error) - prerror("XSCOM: Read failed, ret = %lld\n", ret); + prerror("XSCOM: Read failed, ret = %lld\n", ret); return ret; } @@ -410,7 +403,7 @@ static int __xscom_write(uint32_t gcid, uint32_t pcb_addr, uint64_t val) /* Handle error and possibly eventually retry */ ret = xscom_handle_error(hmer, gcid, pcb_addr, true, retries, - &xscom_clear_retries, false); + &xscom_clear_retries); if (ret != OPAL_BUSY) break; } @@ -458,7 +451,7 @@ static int xscom_indirect_read_form0(uint32_t gcid, uint64_t pcb_addr, /* Wait for completion */ for (retries = 0; retries < XSCOM_IND_MAX_RETRIES; retries++) { - rc = __xscom_read(gcid, addr, &data, false); + rc = __xscom_read(gcid, addr, &data); if (rc) goto bail; if ((data & XSCOM_DATA_IND_COMPLETE) && @@ -520,7 +513,7 @@ static int xscom_indirect_write_form0(uint32_t gcid, uint64_t pcb_addr, /* Wait for completion */ for (retries = 0; retries < XSCOM_IND_MAX_RETRIES; retries++) { - rc = __xscom_read(gcid, addr, &data, false); + rc = __xscom_read(gcid, addr, &data); if (rc) goto bail; if ((data & XSCOM_DATA_IND_COMPLETE) && @@ -595,8 +588,7 @@ void _xscom_unlock(void) /* * External API */ -int _xscom_read(uint32_t partid, uint64_t pcb_addr, uint64_t *val, - bool take_lock, bool ignore_error) +int _xscom_read(uint32_t partid, uint64_t pcb_addr, uint64_t *val, bool take_lock) { uint32_t gcid; int rc; @@ -643,7 +635,7 @@ int _xscom_read(uint32_t partid, uint64_t pcb_addr, uint64_t *val, if (pcb_addr & XSCOM_ADDR_IND_FLAG) rc = xscom_indirect_read(gcid, pcb_addr, val); else - rc = __xscom_read(gcid, pcb_addr & 0x7fffffff, val, ignore_error); + rc = __xscom_read(gcid, pcb_addr & 0x7fffffff, val); /* Unlock it */ if (take_lock) diff --git a/include/npu2-regs.h b/include/npu2-regs.h index 73925f9..c109273 100644 --- a/include/npu2-regs.h +++ b/include/npu2-regs.h @@ -1,4 +1,4 @@ -/* Copyright 2013-2018 IBM Corp. +/* Copyright 2013-2016 IBM Corp. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -24,10 +24,6 @@ uint64_t npu2_read(struct npu2 *p, uint64_t reg); void npu2_write(struct npu2 *p, uint64_t reg, uint64_t val); void npu2_write_mask(struct npu2 *p, uint64_t reg, uint64_t val, uint64_t mask); -/* SCOM Registers to dump on HMI to aid in debugging */ -#define NPU2_DEBUG_REG_START 0x5011000 -#define NPU2_DEBUG_REG_END 0x50110FF - /* These aren't really NPU specific registers but we initialise them in NPU * code */ #define MCD0_BANK0_CN3 0x301100d @@ -472,7 +468,6 @@ void npu2_write_mask(struct npu2 *p, uint64_t reg, uint64_t val, uint64_t mask); #define NPU2_FIR_REGISTER_0 0x0000000005013C00 #define NPU2_FIR_REGISTER_1 0x0000000005013C40 #define NPU2_FIR_REGISTER_2 0x0000000005013C80 -#define NPU2_FIR_REGISTER_END 0x0000000005013CFF #define NPU2_TOTAL_FIR_REGISTERS 3 diff --git a/include/xscom.h b/include/xscom.h index 3193abd..9853224 100644 --- a/include/xscom.h +++ b/include/xscom.h @@ -225,7 +225,7 @@ /* Use only in select places where multiple SCOMs are time/latency sensitive */ extern void _xscom_lock(void); -extern int _xscom_read(uint32_t partid, uint64_t pcb_addr, uint64_t *val, bool take_lock, bool ignore_error); +extern int _xscom_read(uint32_t partid, uint64_t pcb_addr, uint64_t *val, bool take_lock); extern int _xscom_write(uint32_t partid, uint64_t pcb_addr, uint64_t val, bool take_lock); extern void _xscom_unlock(void); @@ -233,7 +233,7 @@ extern void _xscom_unlock(void); /* Targeted SCOM access */ static inline int xscom_read(uint32_t partid, uint64_t pcb_addr, uint64_t *val) { - return _xscom_read(partid, pcb_addr, val, true, false); + return _xscom_read(partid, pcb_addr, val, true); } static inline int xscom_write(uint32_t partid, uint64_t pcb_addr, uint64_t val) { return _xscom_write(partid, pcb_addr, val, true); |