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author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2017-02-03 20:51:57 +1100 |
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committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2017-02-07 14:16:01 +1100 |
commit | dcffe14d4075ac9e8bfce6eb1c53401630a6582f (patch) | |
tree | 75572273807d16f420a7ab31a4f956340e8fcfca | |
parent | 5bd0f9c20481a886a5367cf0ccd9b92b7e0feb87 (diff) | |
download | skiboot-dcffe14d4075ac9e8bfce6eb1c53401630a6582f.zip skiboot-dcffe14d4075ac9e8bfce6eb1c53401630a6582f.tar.gz skiboot-dcffe14d4075ac9e8bfce6eb1c53401630a6582f.tar.bz2 |
lpc: Mark the power9 LPC bus as compatible with power8
We support all the OPAL calls, and it avoids bugs in existing
Linux kernels that would otherwise crash when attempting to
access devices using a direct mapping.
When Linux is fixed it will recognize that direct mapping is
supported and avoid the OPAL calls.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
-rw-r--r-- | hdata/fsp.c | 3 | ||||
-rw-r--r-- | hw/lpc.c | 12 |
2 files changed, 10 insertions, 5 deletions
diff --git a/hdata/fsp.c b/hdata/fsp.c index 656aad7..998724b 100644 --- a/hdata/fsp.c +++ b/hdata/fsp.c @@ -364,7 +364,8 @@ static void bmc_create_node(const struct HDIF_common_hdr *sp) lpc = dt_new_addr(lpcm, "lpc", 0x0); dt_add_property_cells(lpc, "#address-cells", 2); dt_add_property_cells(lpc, "#size-cells", 1); - dt_add_property_strings(lpc, "compatible", "ibm,power9-lpc"); + dt_add_property_strings(lpc, "compatible", + "ibm,power9-lpc", "ibm,power8-lpc"); dt_add_property_cells(lpc, "ranges", 0, 0, mem_bar, 0x10000000, /* MEM space */ @@ -1104,14 +1104,18 @@ void lpc_init(void) struct dt_node *xn; bool has_lpc = false; - dt_for_each_compatible(dt_root, xn, "ibm,power8-lpc") { - lpc_init_chip_p8(xn); - has_lpc = true; - } + /* Look for P9 first as the DT is compatile for both 8 and 9 */ dt_for_each_compatible(dt_root, xn, "ibm,power9-lpcm-opb") { lpc_init_chip_p9(xn); has_lpc = true; } + + if (!has_lpc) { + dt_for_each_compatible(dt_root, xn, "ibm,power8-lpc") { + lpc_init_chip_p8(xn); + has_lpc = true; + } + } if (lpc_default_chip_id >= 0) printf("LPC: Default bus on chip 0x%x\n", lpc_default_chip_id); |