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author | Russell Currey <ruscur@russell.cc> | 2017-08-10 16:58:43 +1000 |
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committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2017-08-11 16:37:24 +1000 |
commit | 8bdfaa24f88bd8800385a6997bb178dfdd970648 (patch) | |
tree | 83fd4339aca21e7a81f1e485393ca802c56ddb69 | |
parent | e29d8492499600118807ce1fde17acbd4e0cb7b9 (diff) | |
download | skiboot-8bdfaa24f88bd8800385a6997bb178dfdd970648.zip skiboot-8bdfaa24f88bd8800385a6997bb178dfdd970648.tar.gz skiboot-8bdfaa24f88bd8800385a6997bb178dfdd970648.tar.bz2 |
phb4: Fix reading wrong size registers in EEH dump
These registers are supposed to be 16bit, and it makes part of the
register dump misleading.
Signed-off-by: Russell Currey <ruscur@russell.cc>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
-rw-r--r-- | hw/phb4.c | 6 |
1 files changed, 3 insertions, 3 deletions
@@ -1906,7 +1906,7 @@ static void phb4_read_phb_status(struct phb4 *p, static void phb4_eeh_dump_regs(struct phb4 *p) { struct OpalIoPhb4ErrorData *s; - uint32_t reg; + uint16_t reg; unsigned int i; if (!verbose_eeh) @@ -1929,9 +1929,9 @@ static void phb4_eeh_dump_regs(struct phb4 *p) PHBERR(p, " uncorrErrorStatus = %08x\n", s->uncorrErrorStatus); /* Two non OPAL API registers that are useful */ - phb4_pcicfg_read32(&p->phb, 0, p->ecap + PCICAP_EXP_DEVCTL, ®); + phb4_pcicfg_read16(&p->phb, 0, p->ecap + PCICAP_EXP_DEVCTL, ®); PHBERR(p, " devctl = %08x\n", reg); - phb4_pcicfg_read32(&p->phb, 0, p->ecap + PCICAP_EXP_DEVSTAT, + phb4_pcicfg_read16(&p->phb, 0, p->ecap + PCICAP_EXP_DEVSTAT, ®); PHBERR(p, " devStat = %08x\n", reg); |