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| author | Madhavan Srinivasan <maddy@linux.vnet.ibm.com> | 2019-09-04 11:42:14 -0400 |
|---|---|---|
| committer | Ram Pai <linuxram@us.ibm.com> | 2020-11-02 19:35:09 -0500 |
| commit | 1159dbc364b8cb839c42147c687070c18d52c07c (patch) | |
| tree | c1cb6a5c4d3f5d7e744d77fa930b4a856534f765 | |
| parent | 0a1317d27857e4cf87b66746d3592690906c2789 (diff) | |
| download | skiboot-1159dbc364b8cb839c42147c687070c18d52c07c.zip skiboot-1159dbc364b8cb839c42147c687070c18d52c07c.tar.gz skiboot-1159dbc364b8cb839c42147c687070c18d52c07c.tar.bz2 | |
pef: Add memcons support for ultravisor
The ultravisor console buffer is provided at offset 0x01100000 from the
skiboot base.
Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Signed-off-by: Santosh Sivaraj <santosh@fossix.org>
| -rw-r--r-- | hw/ultravisor.c | 14 | ||||
| -rw-r--r-- | include/console.h | 3 | ||||
| -rw-r--r-- | include/debug_descriptor.h | 1 | ||||
| -rw-r--r-- | include/mem-map.h | 16 |
4 files changed, 28 insertions, 6 deletions
diff --git a/hw/ultravisor.c b/hw/ultravisor.c index a0e1aee..3a81fe4 100644 --- a/hw/ultravisor.c +++ b/hw/ultravisor.c @@ -11,6 +11,8 @@ #include <inttypes.h> #include <ultravisor.h> #include <mem_region.h> +#include <debug_descriptor.h> +#include <console.h> #include <ultravisor-api.h> #include <libfdt/libfdt.h> @@ -19,6 +21,14 @@ static size_t uv_image_size; struct xz_decompress *uv_xz = NULL; static struct uv_opal *uv_opal; +struct memcons uv_memcons __section(".data.memcons") = { + .magic = MEMCONS_MAGIC, + .obuf_phys = INMEM_UV_CON_START, + .ibuf_phys = INMEM_UV_CON_START + INMEM_UV_CON_OUT_LEN, + .obuf_size = INMEM_UV_CON_OUT_LEN, + .ibuf_size = INMEM_UV_CON_IN_LEN, +}; + static struct dt_node *add_uv_dt_node(void) { struct dt_node *dev, *uv; @@ -324,6 +334,10 @@ void init_uv() start: uv_opal->uv_base_addr = uv_pef_reg; + uv_opal->uv_mem = (__be64)&uv_memcons; + + dt_add_property_u64(node, "memcons", (u64)&uv_memcons); + debug_descriptor.uv_memcons_phys = (u64)&uv_memcons; uv_opal->sys_fdt = (__be64)create_dtb(dt_root, false); if (!uv_opal->sys_fdt) { diff --git a/include/console.h b/include/console.h index 26602b7..0ce95ff 100644 --- a/include/console.h +++ b/include/console.h @@ -28,9 +28,12 @@ struct memcons { }; extern struct memcons memcons; +extern struct memcons uv_memcons; #define INMEM_CON_IN_LEN 16 #define INMEM_CON_OUT_LEN (INMEM_CON_LEN - INMEM_CON_IN_LEN) +#define INMEM_UV_CON_IN_LEN 16 +#define INMEM_UV_CON_OUT_LEN (INMEM_UV_CON_LEN - INMEM_UV_CON_IN_LEN) /* Console driver */ struct con_ops { diff --git a/include/debug_descriptor.h b/include/debug_descriptor.h index 774c360..ab6df0b 100644 --- a/include/debug_descriptor.h +++ b/include/debug_descriptor.h @@ -20,6 +20,7 @@ struct debug_descriptor { /* Memory console */ u64 memcons_phys; + u64 uv_memcons_phys; u32 memcons_tce; u32 memcons_obuf_tce; u32 memcons_ibuf_tce; diff --git a/include/mem-map.h b/include/mem-map.h index 9914651..6e8b33a 100644 --- a/include/mem-map.h +++ b/include/mem-map.h @@ -89,16 +89,20 @@ #define INMEM_CON_START (SKIBOOT_BASE + 0x01000000) #define INMEM_CON_LEN 0x100000 -/* This is the location of HBRT console buffer at base + 17M */ -#define HBRT_CON_START (SKIBOOT_BASE + 0x01100000) +/* This is the location of our ultravisor console buffer at base + 17M */ +#define INMEM_UV_CON_START (SKIBOOT_BASE + 0x01100000) +#define INMEM_UV_CON_LEN 0x100000 + +/* This is the location of HBRT console buffer at base + 18M */ +#define HBRT_CON_START (SKIBOOT_BASE + 0x01200000) #define HBRT_CON_LEN 0x100000 -/* Tell FSP to put the init data at base + 20M, allocate 8M */ -#define SPIRA_HEAP_BASE (SKIBOOT_BASE + 0x01200000) +/* Tell FSP to put the init data at base + 19M, allocate 8M */ +#define SPIRA_HEAP_BASE (SKIBOOT_BASE + 0x01300000) #define SPIRA_HEAP_SIZE 0x00800000 /* This is our PSI TCE table. It's 256K entries on P8 */ -#define PSI_TCE_TABLE_BASE (SKIBOOT_BASE + 0x01a00000) +#define PSI_TCE_TABLE_BASE (SKIBOOT_BASE + 0x01c00000) #define PSI_TCE_TABLE_SIZE_P8 0x00200000UL /* This is our dump result table after MPIPL. Hostboot will write to this @@ -117,7 +121,7 @@ * * (Ensure this has at least a 64k alignment) */ -#define SKIBOOT_SIZE 0x01c10000 +#define SKIBOOT_SIZE 0x01e00000 /* We start laying out the CPU stacks from here, indexed by PIR * each stack is STACK_SIZE in size (naturally aligned power of |