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| author | Joel Stanley <joel@jms.id.au> | 2020-05-06 16:27:16 +0530 |
|---|---|---|
| committer | Vasant Hegde <hegdevasant@linux.vnet.ibm.com> | 2020-06-06 10:21:39 +0530 |
| commit | f56a1f08cc1500614604d7625b2dee47c90f9383 (patch) | |
| tree | 08d2a05e361df6d404b81d2edc8f5acb701d6c4a | |
| parent | b5b1ae1d6a0e945b43d91510c3d6ca2adf6a8f30 (diff) | |
| download | skiboot-f56a1f08cc1500614604d7625b2dee47c90f9383.zip skiboot-f56a1f08cc1500614604d7625b2dee47c90f9383.tar.gz skiboot-f56a1f08cc1500614604d7625b2dee47c90f9383.tar.bz2 | |
Detect fused core mode and bail out
[ Upstream commit 482f18adf21eeb5f6ce2a93334725509a8f6f0cd ]
Fused code mode is currently not supported in OPAL. Continuing to
boot the system would result in errors at later stages of boot.
Wait for console to be up and print message for developers to check
and fix the system modes.
Signed-off-by: Vaidyanathan Srinivasan <svaidy@linux.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Tested-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
| -rw-r--r-- | core/init.c | 4 | ||||
| -rw-r--r-- | include/processor.h | 16 |
2 files changed, 20 insertions, 0 deletions
diff --git a/core/init.c b/core/init.c index 595d087..89240f6 100644 --- a/core/init.c +++ b/core/init.c @@ -1280,6 +1280,10 @@ void __noreturn __nomcount main_cpu_entry(const void *fdt) /* Install the OPAL Console handlers */ init_opal_console(); + if(is_fused_core(mfspr(SPR_PVR))) { + prerror("CPU: Detected unsupported fused core mode\n"); + abort(); + } /* * Some platforms set a flag to wait for SBE validation to be * performed by the BMC. If this occurs it leaves the SBE in a diff --git a/include/processor.h b/include/processor.h index 57c2ee1..42002fc 100644 --- a/include/processor.h +++ b/include/processor.h @@ -173,10 +173,12 @@ /* PVR bits */ #define SPR_PVR_TYPE 0xffff0000 +#define SPR_PVR_CHIP_TYPE 0x0000f000 #define SPR_PVR_VERS_MAJ 0x00000f00 #define SPR_PVR_VERS_MIN 0x000000ff #define PVR_TYPE(_pvr) GETFIELD(SPR_PVR_TYPE, _pvr) +#define PVR_CHIP_TYPE(_pvr) GETFIELD(SPR_PVR_CHIP_TYPE, _pvr) #define PVR_VERS_MAJ(_pvr) GETFIELD(SPR_PVR_VERS_MAJ, _pvr) #define PVR_VERS_MIN(_pvr) GETFIELD(SPR_PVR_VERS_MIN, _pvr) @@ -228,6 +230,20 @@ static inline bool is_power9n(uint32_t version) return true; } +static inline bool is_fused_core(uint32_t version) +{ + if (PVR_TYPE(version) != PVR_TYPE_P9) + return false; + + switch(PVR_CHIP_TYPE(version)) { + case 0: + case 2: + return true; + default: + return false; + } +} + #ifndef __TEST__ /* |