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| author | Oliver O'Halloran <oohall@gmail.com> | 2020-04-02 22:13:54 +1100 |
|---|---|---|
| committer | Oliver O'Halloran <oohall@gmail.com> | 2020-04-08 14:38:33 +1000 |
| commit | 9b612fff557f67f001b4772c180a50a9cb92e6bb (patch) | |
| tree | 096c013c91df2cda3cd0a10db8f142fb3b63a3f2 | |
| parent | 7b57002d3f5fd45caeb53240bf401803c528b865 (diff) | |
| download | skiboot-9b612fff557f67f001b4772c180a50a9cb92e6bb.zip skiboot-9b612fff557f67f001b4772c180a50a9cb92e6bb.tar.gz skiboot-9b612fff557f67f001b4772c180a50a9cb92e6bb.tar.bz2 | |
hw/centaur: Convert to use the new scom API
Currently we assume any xscom_read / write targeted at a chipid with 0x8
as the top four bits is intended to be a centaur SCOM. On non-P8
platforms there is no reason to assume this so covert it to use the
new struct scom_controller infrastructure.
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
| -rw-r--r-- | hw/centaur.c | 18 | ||||
| -rw-r--r-- | hw/xscom.c | 4 | ||||
| -rw-r--r-- | include/centaur.h | 4 |
3 files changed, 16 insertions, 10 deletions
diff --git a/hw/centaur.c b/hw/centaur.c index c79dd7f..e9ff419 100644 --- a/hw/centaur.c +++ b/hw/centaur.c @@ -307,9 +307,11 @@ static int centaur_xscom_ind_write(struct centaur_chip *centaur, return rc; } -int64_t centaur_xscom_read(uint32_t id, uint64_t pcb_addr, uint64_t *val) +static int64_t centaur_xscom_read(struct scom_controller *scom, + uint32_t id __unused, uint64_t pcb_addr, + uint64_t *val) { - struct centaur_chip *centaur = get_centaur(id); + struct centaur_chip *centaur = scom->private; int64_t rc; if (!centaur) @@ -349,9 +351,11 @@ int64_t centaur_xscom_read(uint32_t id, uint64_t pcb_addr, uint64_t *val) return rc; } -int64_t centaur_xscom_write(uint32_t id, uint64_t pcb_addr, uint64_t val) +static int64_t centaur_xscom_write(struct scom_controller *scom, + uint32_t id __unused, uint64_t pcb_addr, + uint64_t val) { - struct centaur_chip *centaur = get_centaur(id); + struct centaur_chip *centaur = scom->private; int64_t rc; if (!centaur) @@ -463,6 +467,12 @@ static bool centaur_add(uint32_t part_id, uint32_t mchip, uint32_t meng, if (!centaur_check_id(centaur)) return false; + centaur->scom.part_id = part_id; + centaur->scom.private = centaur; + centaur->scom.read = centaur_xscom_read; + centaur->scom.write = centaur_xscom_write; + scom_register(¢aur->scom); + cent_log(PR_INFO, centaur, "Found DD%x.%x chip\n", centaur->ec_level >> 4, centaur->ec_level & 0xf); @@ -667,8 +667,6 @@ int _xscom_read(uint32_t partid, uint64_t pcb_addr, uint64_t *val, bool take_loc case 0: /* Normal processor chip */ gcid = partid; break; - case 8: /* Centaur */ - return centaur_xscom_read(partid, pcb_addr, val); case 4: /* EX chiplet */ gcid = xscom_decode_chiplet(partid, &pcb_addr); if (pcb_addr == 0) @@ -730,8 +728,6 @@ int _xscom_write(uint32_t partid, uint64_t pcb_addr, uint64_t val, bool take_loc case 0: /* Normal processor chip */ gcid = partid; break; - case 8: /* Centaur */ - return centaur_xscom_write(partid, pcb_addr, val); case 4: /* EX chiplet */ gcid = xscom_decode_chiplet(partid, &pcb_addr); break; diff --git a/include/centaur.h b/include/centaur.h index 9089705..9845946 100644 --- a/include/centaur.h +++ b/include/centaur.h @@ -22,6 +22,8 @@ struct centaur_chip { uint32_t error_count; struct lock lock; + struct scom_controller scom; + /* Used by hw/p8-i2c.c */ struct list_head i2cms; }; @@ -29,8 +31,6 @@ struct centaur_chip { extern int64_t centaur_disable_sensor_cache(uint32_t part_id); extern int64_t centaur_enable_sensor_cache(uint32_t part_id); -extern int64_t centaur_xscom_read(uint32_t id, uint64_t pcb_addr, uint64_t *val) __warn_unused_result; -extern int64_t centaur_xscom_write(uint32_t id, uint64_t pcb_addr, uint64_t val) __warn_unused_result; extern void centaur_init(void); extern struct centaur_chip *get_centaur(uint32_t part_id); |