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author | Gavin Shan <gwshan@linux.vnet.ibm.com> | 2016-10-14 15:26:03 +1100 |
---|---|---|
committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2016-10-17 10:33:55 +1100 |
commit | 39aad95618fea977464bfc38ec0c190075a26304 (patch) | |
tree | 86e389a084d7404bc5e2817e206639335aa087c2 | |
parent | 27ed9b4ceae9f852ab7a80065590007564863e4e (diff) | |
download | skiboot-39aad95618fea977464bfc38ec0c190075a26304.zip skiboot-39aad95618fea977464bfc38ec0c190075a26304.tar.gz skiboot-39aad95618fea977464bfc38ec0c190075a26304.tar.bz2 |
core/pci: Get PCI slot before applying quirk
We might need know the associated PCI slot before applying the chip
level quirk (phb->ops->device_init()) so that special configuration
on the specific PCI slot can be applied.
This moves the logic of creating PCI slot, applying the quirk and
linking the newly probed device to parent's child list to function
pci_scan_one(). Also, the PCI slot is created prior to applying the
quirk.
Cc: stable # 5.3.0+
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
-rw-r--r-- | core/pci.c | 22 |
1 files changed, 10 insertions, 12 deletions
@@ -259,6 +259,16 @@ static struct pci_device *pci_scan_one(struct phb *phb, struct pci_device *paren pd->is_bridge ? "+" : "-", pci_has_cap(pd, PCI_CFG_CAP_ID_EXP, false) ? "+" : "-"); + /* Try to get PCI slot behind the device */ + if (platform.pci_get_slot_info) + platform.pci_get_slot_info(phb, pd); + + /* Put it to the child device of list of PHB or parent */ + if (!parent) + list_add_tail(&phb->devices, &pd->link); + else + list_add_tail(&parent->children, &pd->link); + /* * Call PHB hook */ @@ -566,13 +576,6 @@ uint8_t pci_scan_bus(struct phb *phb, uint8_t bus, uint8_t max_bus, if (!pd) continue; - /* Get slot info if any */ - if (platform.pci_get_slot_info) - platform.pci_get_slot_info(phb, pd); - - /* Link it up */ - list_add_tail(list, &pd->link); - /* XXX Handle ARI */ if (!pd->is_multifunction) continue; @@ -580,11 +583,6 @@ uint8_t pci_scan_bus(struct phb *phb, uint8_t bus, uint8_t max_bus, pd = pci_scan_one(phb, parent, ((uint16_t)bus << 8) | (dev << 3) | fn); pci_check_clear_freeze(phb); - if (pd) { - if (platform.pci_get_slot_info) - platform.pci_get_slot_info(phb, pd); - list_add_tail(list, &pd->link); - } } } |