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| author | Milton Miller <miltonm@us.ibm.com> | 2016-09-02 14:39:58 +1000 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2016-09-02 15:52:06 +1000 |
| commit | fc7484515a357a08d44a250f0b701b6edb093653 (patch) | |
| tree | a94187396328d26f580b257fd1fad13f81a92a6f | |
| parent | b2b8e29dc217eb05456e8d18e7846030f9693115 (diff) | |
| download | skiboot-fc7484515a357a08d44a250f0b701b6edb093653.zip skiboot-fc7484515a357a08d44a250f0b701b6edb093653.tar.gz skiboot-fc7484515a357a08d44a250f0b701b6edb093653.tar.bz2 | |
hw/npu: assert the NPU irq min is aligned.
The hardware enforces the buid range is on a 16 irsn boundary
even though there are only 8 irqs. Enforce that here and show
where the value comes from when programming the lsi source id
field in the npu register block.
Signed-off-by: Milton Miller <miltonm@us.ibm.com>
Signed-off-by: Alistair Popple <alistair@popple.id.au>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
(cherry picked from commit ac83440c8241902d2c32410050a2fd1e96b20fcf)
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
| -rw-r--r-- | hw/npu.c | 4 |
1 files changed, 3 insertions, 1 deletions
@@ -26,6 +26,7 @@ #include <device.h> #include <ccan/str/str.h> #include <ccan/array_size/array_size.h> +#include <ccan/build_assert/build_assert.h> #include <affinity.h> #include <npu-regs.h> #include <npu.h> @@ -798,7 +799,8 @@ static void npu_hw_init(struct npu *p) { /* 3 MMIO setup for AT */ out_be64(p->at_regs + NPU_LSI_SOURCE_ID, - SETFIELD(NPU_LSI_SRC_ID_BASE, 0ul, 0x7f)); + SETFIELD(NPU_LSI_SRC_ID_BASE, 0ul, NPU_LSI_IRQ_MIN >> 4)); + BUILD_ASSERT((NPU_LSI_IRQ_MIN & 0x07F0) == NPU_LSI_IRQ_MIN); out_be64(p->at_regs + NPU_INTREP_TIMER, 0x0ul); npu_ioda_reset(&p->phb, false); } |