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| author | Gavin Shan <gwshan@linux.vnet.ibm.com> | 2016-04-26 11:56:51 +1000 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2016-04-29 14:24:32 +1000 |
| commit | a2c5edeb2b0b357785033150c97ddeada5932f2d (patch) | |
| tree | f9336e7964b99fc05e3c6d9c878cb27a4f453945 | |
| parent | 057eca8c732c82ffdd2caaf524a35ac0c66a6fbb (diff) | |
| download | skiboot-a2c5edeb2b0b357785033150c97ddeada5932f2d.zip skiboot-a2c5edeb2b0b357785033150c97ddeada5932f2d.tar.gz skiboot-a2c5edeb2b0b357785033150c97ddeada5932f2d.tar.bz2 | |
PHB3: Fix corruption of pref window register
On P8+ Garrison platform, the root port's pref window register might
be not writable and we have to emulate the window because of hardware
defect. In order to detect that, we read the register content, write
inversed value and read the register content again. The register is
regarded as read-only if the values from the two continuous read are
same. However, the original register content isn't written back and
it causes corruption on pref window register if it's writable.
This fixes the above issue by writing the original content back to
the register at the end.
Fixes: d40160f6 ("PHB3: Emulate root complex pref 64-bits window")
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
| -rw-r--r-- | hw/phb3.c | 2 |
1 files changed, 2 insertions, 0 deletions
@@ -527,6 +527,8 @@ static void phb3_check_device_quirks(struct phb *phb, struct pci_device *dev) PCI_CFG_PREF_MEM_BASE_U32, ~pref_hi); pci_cfg_read32(phb, dev->bdfn, PCI_CFG_PREF_MEM_BASE_U32, &tmp); + pci_cfg_write32(phb, dev->bdfn, + PCI_CFG_PREF_MEM_BASE_U32, pref_hi); if (tmp == pref_hi) pci_add_cfg_reg_filter(dev, PCI_CFG_PREF_MEM_BASE_U32, 12, |