From 484270d5ec465d1b5c02d8d60df9e46578e408e7 Mon Sep 17 00:00:00 2001
From: Kevin O'Connor <kevin@koconnor.net>
Date: Sun, 17 Aug 2008 10:50:57 -0400
Subject: Improve smp detection code.

Use 'lock incw' to ensure proper synchronization between cpus.
Jump to the 0xf0000 segment for the halt (to ensure halt code isn't overwritten).
Improve code comments.
---
 src/romlayout.S | 10 ++++++++++
 src/smpdetect.c | 12 ++++++------
 2 files changed, 16 insertions(+), 6 deletions(-)

(limited to 'src')

diff --git a/src/romlayout.S b/src/romlayout.S
index 6eda036..3eaf725 100644
--- a/src/romlayout.S
+++ b/src/romlayout.S
@@ -318,6 +318,16 @@ post32:
 
         .code16gcc
 
+// Shutdown a CPU.  We want this in the 0xf000 section to ensure that
+// the code wont be overwritten with something else.  (Should
+// something spurious wake up the CPU, we want to be sure that the hlt
+// insn will still be present and will shutdown the CPU.)
+        .global permanent_halt
+permanent_halt:
+        cli
+1:      hlt
+        jmp 1b
+
 
 /****************************************************************
  * GDT and IDT tables
diff --git a/src/smpdetect.c b/src/smpdetect.c
index c0f0903..db47943 100644
--- a/src/smpdetect.c
+++ b/src/smpdetect.c
@@ -54,12 +54,12 @@ asm(
     "  .code16\n"
 
     "smp_ap_boot_code_start:\n"
-    "  xor %ax, %ax\n"
-    "  mov %ax, %ds\n"
-    "  incw " __stringify(BUILD_CPU_COUNT_ADDR) "\n"
-    "1:\n"
-    "  hlt\n"
-    "  jmp 1b\n"
+    // Increament the counter at BUILD_CPU_COUNT_ADDR
+    "  xorw %ax, %ax\n"
+    "  movw %ax, %ds\n"
+    "  lock incw " __stringify(BUILD_CPU_COUNT_ADDR) "\n"
+    // Halt the processor.
+    "  ljmpl $" __stringify(SEG_BIOS) ", $(permanent_halt - " __stringify(BUILD_BIOS_ADDR) ")\n"
     "smp_ap_boot_code_end:\n"
 
     "  .code32\n"
-- 
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