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Change the multi-processor init code to trampoline into 32bit mode on
each of the additional processors. Implement an atomic lock so that
each processor performs its initialization serially.
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Describe the memory layout using a struct instead of hard coded
offsets.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Convert the SMI handler from assembly to C. This makes the handler
easier to understand and enhance.
The new handler will use references to the reserved memory at
0xf0000-0x100000. If the physical memory in that range is modified at
runtime, then the SMI handler will cease to function properly (and may
allow unintended code to run in SMM mode). However, that area is
marked as reserved and is normally made read-only at runtime, so there
is little risk in relying on it.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Some XHCI controllers can request a significant chunk of reserved
memory for scratch pad buffers. (At least one controller Intel
Haswell based controller has been seen to request 64KiB.) Unused
memory is returned after POST completes, so it should be okay to
increase the maximum permanent high memory zone from 64K to 256K.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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The ACPI code has a hardcoded list of PCI interrupts. Use that same
list in the mptable code generation. This will ensure that both
tables are in synch - it may also make the mptable easier to generate
from QEMU.
Also, move the irq0_override lookup outside of the irq loop.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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The PCI-BIOS entry point can be called in 16bit protected mode, so
separate its entry code from the legacy 0x1a code.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Rename remaining "build" settings in config.h that used the CONFIG_
prefix to use a BUILD_ prefix.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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The BiosTableSpace variable was used to ensure there was sufficient
space in the f-segment for malloc_fseg() calls. However, it added 2K
to the final image size to reserve that space.
Update the build to determine where to put the f-segment allocations.
In most cases (when code relocation is enabled) allocations can be
done in the space free'd from the "init" sections and no additional
space needs to be reserved in the final image. This also has the
benefit of not fragmenting the f-segment allocation space.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Set up the UC area of mtrr dynamically based on mtrr_base. This allows
the bios to work for other chipsets that might want to set the mtrr.
Since BUILD_MAX_HIGHMEM is no longer used we can remove the config parameter.
This change reverses the order of pci_setup() and smm_init() with
mtrr_setup().
Signed-off-by: Jason Baron <jbaron@redhat.com>
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When resetting an I/O APIC, its ID is set to 0, and SeaBIOS doesn't
change it, so report it correctly on the ACPI MADT table and MP-table.
Some hardware may require the BIOS to initialize I/O APIC ID to an
unique value, but SeaBIOS doesn't do that. This patch at least makes the
tables reflect reality.
Changes v2 -> v3:
- Fix MP-table too, not just ACPI MADT table
Changes v1 -> v2:
- Cosmetic: whitespace change (removed extra newline)
- New patch description
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
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Allow both optionroms and "low mem" allocations to use the e-segment.
(Space is allocated on a "first come, first serve" basis). This
allows more flexibility in resource assignment.
Also, allow the "low mem" area to use a full 64K.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Add a mechanism (VARLOW declaration) to make a variable reside in the
low memory (e-segment) area. This is useful for runtime variables
that need to be accessed from 16bit code and need to be modifiable
during runtime.
Move the 16bit "extra stack" from the EBDA to the low memory area
using this declaration mechanism. Also increase the size of this
stack from 512 bytes to 2048 bytes.
This also reworks tools/layoutrom.py a bit.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Use the e-segment for ZoneLow allocations. There is plenty of
e-segment space (there has been since SeaBIOS supported code
relocation), while using the 9-segment space can impact old real-mode
applications.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Migrate 64bit entries to 64bit pci regions if they do
not fit in 32bit range.
Signed-off-by: Alexey Korolev <alexey.korolev@endace.com>
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Move ACPI_HPET_ADDRESS to BUILD_HPET_ADDRESS in config.h so that it
is listed with similar hardcoded addresses.
Also, organize the BUILD_*_ADDRESS definitions in config.h.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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If the SMBIOS is small (less than 600 bytes) allow it to be allocated
in the f-segment. This works around a bug in JunOS - it crashes on
SMBIOS tables located in high memory.
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... and make it match with the declarations in acpi-dsdt.dsl.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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Passing in rom locations via absolute memory addresses hasn't been
needed since coreboot adopted CBFS support (which as several years
ago).
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Move most of the config settings in config.h to the Kconfig file. The
remaining settings in config.h, are mostly build related.
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Don't require the build directory to be the "out/" directory of the
SeaBIOS source.
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Create autoconf.h during the build.
Move a couple of config settings from config.h to Kconfig.
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This patch adds AHCI support to seabios. Tested with virtual hardware
only (upcoming ahci support in qemu). Coded by looking at the
recommandations in the intel ahci specs, so I don't expect much trouble
on real hardware. Tested booting fedora install from hard disk and a
opensuse live iso from cdrom.
[ v2: disable by default ]
[ v2: add check for malloc failure ]
[ v2: wind up disk write support ]
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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Add support for moving the 32bit init code out of the e/f-segments and
into temporary ram. Update the relocations in the code so that it can
live at its new address.
This frees up memory for other uses in the e/f segments.
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Replace video mode settings in config.h with a system to auto-detect a
video mode for the given bootsplash.jpg file.
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Make pci bar assigner preferchable memory aware.
This is needed for PCI bridge support because memory space and
prefetchable memory space is filtered independently based on
memory base/limit and prefetchable memory base/limit of pci bridge.
On bus 0, such a distinction isn't necessary so keep existing behavior
by checking bus=0.
With this patch, pci mem assignment area has been decreased.
To make seabios behave as before for compatible reason,
define CONFIG_OLD_PCIMEM_ASSIGNMENT.
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
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Support displaying a jpeg file (stored in cbfs) during bootup.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
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This patch adds native support for booting from virtio disks to Seabios.
Signed-off-by: Gleb Natapov <gleb@redhat.com>
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Initial support for USB mice that follow the "boot" protocol.
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Coreboot users will almost certainly want CBFS support, and
non-coreboot users have no use for it. So, make that the default
behaviour.
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Initial support for EHCI high-speed USB controllers.
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Don't limit the number of ATA controllers supported - just dynamically
allocate the structs.
Create an atadrive_s struct that extends the standard 'struct drive_s'
and have the new struct store a pointer to the ata channel info.
Also, prefer storing drive_s pointers as 32bit "flat" pointers -
adjust them as needed in the 16bit code.
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This patch adds initial support for USB Mass Storage Controllers.
This includes support for bulk transfers on UHCI controllers.
Code to detect a USB MSC device is added, and wrappers for sending
"cdb" block commands over USB are added.
The scsi "inquiry" command is also added.
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This eliminates the limit on the number of available drives. It also
allows for each driver to allocate additional custom fields.
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Add support for detecting, initializing, and enumerating USB hubs.
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Qemu/Kvm still has some dependencies on 0xe0000000, so go back until
they are ready.
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Allow compile option to disable ATA DMA support.
Turn it off by default for now - some coreboot users are seeing issues
with it.
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Add APM code to 32bit segmented code.
Use 32bit APM code instead of jumping into 16bit mode.
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Create a new code blob (code32seg) with support for 32bit functions
that need to utilize explicit segment accesses.
This code blob uses global variables relative to %gs and with a
dynamic code offset (determined by get_global_offset()).
Add BIOS32 structure and code.
Add code for 32bit PCI BIOS code.
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Since qemu now supports loading option roms through PCI
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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Don't use "fail" in the debug output - as this confuses users.
When reporting on an invalid parameter - use the word "invalid".
When reporting on an unimplemented call - state it is unimplemented.
Add separate debug levels for unimplemented vs invalid calls.
Also, increase the debug level of several entry points.
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Add option (default disabled) that allows the vga rom to run while
hardware init is still in progress.
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It appears gPXE also uses a stack at 0x7c00. gPXE probably shouldn't
do that, but for now, move SeaBIOS stack to 0x7000.
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Show the "thread id" on each debug message sent from a thread.
Also, cleanup translation dprintf() so it looks nicer withe thread output.
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Enable system for running hardware initialization in parallel.
The yield() call can now round-robin between "threads".
Rework ata controller init to use a thread per controller.
Make sure internal drives are registered in a defined order.
Run keyboard initialization in a thread.
Rework usb init to use a thread per controller.
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Get UHCI support to point where it works with (a modified) qemu.
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