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Add CONFIG_BOOTMENU_WAIT option with delay time (in milliseconds).
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Support payloads compressed with lzma.
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Almost nothing really wants A20 off today - so add a config option
(and default it off) to control turning A20 off during 16bit
bootup.
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Add code to search for roms in the "coreboot file system".
Change hardcode option rom detection to use vendor/deviceid instead of
bus/device/fn.
Move streq() function to generic place so cbfs functions can use it.
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Rename handle_nmi to handle_02 to be more consistent with other handlers.
Actually register handle_02.
Don't panic in nmi handler - just log by default.
Set the disable nmi bit when accessing the cmos index register.
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Allow extra root buses to be specified in src/config.h.
This is based on a patch by Myles Watson.
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The PIO32 detection appears to use a hack built for emulators. It
wont work on real hardware.
Implement with a compile time define instead.
This also improves the quality of the compiled code.
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In an smp simulation, the smbios/mptable need more space than was allocated.
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The latest PCI spec requires option roms to call default bios
handler. So, the bios must not mask irqs.
Also, make the default hw irq handlers less verbose.
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Define the e820list as a regular array.
Define a buffer for run-time built bios tables.
Reserving the space in advance should help prevent run-time errors
when space becomes tight.
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Define macro VAR16FIXED for declaring a variable at a fixed location.
Introduce new file src/misc.c, and move non int15 calls from system.c
to it.
Implement all fixed location variables in C code.
Move IDT/GDT defs to misc.c. Remove unused gdt entry 1.
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The fixed offset requirements of the 16bit code can be done using
multiple sections and a linker script. Using the linker allows
for more flexibility.
Also, have the 16bit code generate sections for every function and
variable definition.
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Add some of the enhancements KVM has to their bochs bios tree. This
is only partial support for KVM - some features still do not work
correctly.
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The interrupt vector table is technically at 0x0000.
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Some option roms will try to relocate the ebda.
Also fix an apparent typo in the assignment of ivecs[0x46].
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This commit provides just enough PnP support for gPXE to not hook int19.
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Introduce two default handlers (hwpic1 and hwpic2) and register them
accordingly. This ensures the proper pic always gets an eoi.
Also, use DEBUG_ISR_hwpic1/2 to determine debugging level.
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Update ACPI DSDT tables with S3 info.
Change acpi table signatures to use integers.
Save location of rsdp table (so that S3 resume can easily find it later).
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Save/restore memory changed during smm init - this is based on a patch
committed to bochs bios.
Also, clean up ioport and base memory address definitions for smm.
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Compile the smp detect handler with the rest of the 16bit code.
Implement a simple ljmpw trampoline so the main code can run in place.
Restore memory afterwards to prevent memory corruption.
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PCI_ROM_ADDRESS is only valid for PCI_HEADER_TYPE_NORMAL devices.
Don't attempt to run a rom with address less than 16MiB.
Don't run roms for IDE code when native IDE support is available.
Also, move hardcode option rom defs to config.h.
Also, add some minor code cleanups.
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The BIOS Boot Specification recommends 0x7c00 - 0xffff for option rom
temp storage, so don't use that space as a stack.
Also, default CONFIG_VGAHOOKS off as it isn't generally useful.
Finally, update TODO list.
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Remove PCIDevice struct and replace with a "u16" with BDF -
Bus/Device/Function. This simplifies the code in several places.
Also, scan for and store the maximum PCI bus found during startup.
The previous config option CONFIG_PCI_BUS_COUNT is no longer
needed and has been removed.
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Add initial support for scanning PCI devices for option roms.
Implement two pass option rom scan - init first then scan for bev/bcv.
Support calling BCV vectors that are found.
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This moves the 32bit segment names next to the real-mode segment names.
Also, renames them to be more consistent.
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Allocate the e820 map space in the 0xf0000 segment and do all updates
in place. This reduces the need to access external memory during
post.
Also, move e820 pointer and count from ebda to variables in 0xf0000.
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Storing the .bss separately from .data is confusing - so unite them.
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Add new option CONFIG_PCI_BUS_COUNT to set max bus count.
Use that option consistently in handle_1ab101() and pci.c.
Also, clean up comments of handle_1ab101().
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Define all the required app names in config.h directly.
Control UUID detection via new option - CONFIG_UUID_BACKDOOR.
Don't enable mptable on uniprocessor machines (check use to only be
done for qemu, but it is needed everywhere).
Also add new option CONFIG_SMBIOS.
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Added options CONFIG_BOOT, CONFIG_SERIAL, CONFIG_LPT, CONFIG_KEYBOARD,
CONFIG_BOOTMENU.
Also extended coverage of existing options to ensure full code got
removed.
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The rom16.o object will now have absolute (32bit applicable) addresses.
Replace several 0xf0000 and 0x10000 uses with CONFIG_BIOS_ADDR/SIZE macros.
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Remove option CONFIG_USE_EBDA_TABLES -- it's just broken.
Convert several '#if CONFIG_X' to 'if (CONFIG_X)'.
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Add handler that can react to any unknown hardware irq by masking that
irq. This can be useful for finding/fixing run away irq issues.
Don't currently register these hardware irq handlers
Also, sort and improve default debug levels for bios handlers.
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This allows one to easily enable verbose output from handlers.
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Move acpi code from rombios32.c to acpi.c.
Move all fixed memory addresses used by the code to config.h and
consistently use a "BUILD_" prefix on the definitions.
Move some pci defs to pci.h - allows access from acpi.c and rombios32.c.
Introduce ALIGN() macro - remove old align function.
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New option CONFIG_APMBIOS can be used to disable apm.
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Rename BX_INFO() to dprintf() and add a "severity level" parameter.
Add CONFIG_DEBUG_LEVEL compile option to control debug verbosity.
Add more debug info to init steps of post.c.
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Allow one to enable/disable PIR tables separately from PCI BIOS support.
Use standard PORT_* defs for 0xcf8/0xcfc port accesses.
Don't pass PCIDevice pointers around - the struct is small enough to
pass in a register.
Extract out pci_find_device and pci_find_class functions from PCI BIOS
code.
Remove PCI_FIXED_HOST_BRIDGE check - the check is too late if standard
PCI support isn't available. If standard support is available,
then the code should be okay to run.
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Add new option for targetting a coreboot payload.
When in coreboot mode, configure out those parts of the code that wont
work on real hardware.
Don't include cmos.h in files that don't need it.
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With a linker script the data sections can be grouped by themselves
instead of being dispersed throughout the code.
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Enable by turning on CONFIG_DEBUG_SERIAL option.
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