vgabios: Extend information in internal vgamode_s struct.

Copy all the data in video_param_table to vga_modes.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>

2 files changed, 157 insertions, 19 deletions

diff --git a/vgasrc/vgatables.c b/vgasrc/vgatables.c
index 17a6ca6..9fac4cd 100644
--- a/vgasrc/vgatables.c
+++ b/vgasrc/vgatables.c
@@ -245,7 +245,7 @@ struct VideoParam_s video_param_table[] VAR16 = {
 
 
 /****************************************************************
- * Palette definitions
+ * Register definitions
  ****************************************************************/
 
 /* Mono */
@@ -376,6 +376,117 @@ static u8 palette3[] VAR16 = {
   0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00
 };
 
+static u8 sequ_01[] VAR16 = { 0x08, 0x03, 0x00, 0x02 };
+static u8 crtc_01[] VAR16 = {
+    0x2d, 0x27, 0x28, 0x90, 0x2b, 0xa0, 0xbf, 0x1f,
+    0x00, 0x4f, 0x0d, 0x0e, 0x00, 0x00, 0x00, 0x00,
+    0x9c, 0x8e, 0x8f, 0x14, 0x1f, 0x96, 0xb9, 0xa3,
+    0xff };
+static u8 actl_01[] VAR16 = {
+    0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x14, 0x07,
+    0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
+    0x0c, 0x00, 0x0f, 0x08 };
+static u8 grdc_01[] VAR16 = {
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0e, 0x0f, 0xff };
+static u8 sequ_03[] VAR16 = { 0x00, 0x03, 0x00, 0x02 };
+static u8 crtc_03[] VAR16 = {
+    0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f,
+    0x00, 0x4f, 0x0d, 0x0e, 0x00, 0x00, 0x00, 0x00,
+    0x9c, 0x8e, 0x8f, 0x28, 0x1f, 0x96, 0xb9, 0xa3,
+    0xff };
+static u8 sequ_04[] VAR16 = { 0x09, 0x03, 0x00, 0x02 };
+static u8 crtc_04[] VAR16 = {
+    0x2d, 0x27, 0x28, 0x90, 0x2b, 0x80, 0xbf, 0x1f,
+    0x00, 0xc1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x9c, 0x8e, 0x8f, 0x14, 0x00, 0x96, 0xb9, 0xa2,
+    0xff };
+static u8 actl_04[] VAR16 = {
+    0x00, 0x13, 0x15, 0x17, 0x02, 0x04, 0x06, 0x07,
+    0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
+    0x01, 0x00, 0x03, 0x00 };
+static u8 grdc_04[] VAR16 = {
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x0f, 0x0f, 0xff };
+static u8 sequ_06[] VAR16 = { 0x01, 0x01, 0x00, 0x06 };
+static u8 crtc_06[] VAR16 = {
+    0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0xbf, 0x1f,
+    0x00, 0xc1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x9c, 0x8e, 0x8f, 0x28, 0x00, 0x96, 0xb9, 0xc2,
+    0xff };
+static u8 actl_06[] VAR16 = {
+    0x00, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17,
+    0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17,
+    0x01, 0x00, 0x01, 0x00 };
+static u8 grdc_06[] VAR16 = {
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0d, 0x0f, 0xff };
+static u8 crtc_07[] VAR16 = {
+    0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f,
+    0x00, 0x4f, 0x0d, 0x0e, 0x00, 0x00, 0x00, 0x00,
+    0x9c, 0x8e, 0x8f, 0x28, 0x0f, 0x96, 0xb9, 0xa3,
+    0xff };
+static u8 actl_07[] VAR16 = {
+    0x00, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08,
+    0x10, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
+    0x0e, 0x00, 0x0f, 0x08 };
+static u8 grdc_07[] VAR16 = {
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0a, 0x0f, 0xff };
+static u8 sequ_0d[] VAR16 = { 0x09, 0x0f, 0x00, 0x06 };
+static u8 crtc_0d[] VAR16 = {
+    0x2d, 0x27, 0x28, 0x90, 0x2b, 0x80, 0xbf, 0x1f,
+    0x00, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x9c, 0x8e, 0x8f, 0x14, 0x00, 0x96, 0xb9, 0xe3,
+    0xff };
+static u8 actl_0d[] VAR16 = {
+    0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
+    0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
+    0x01, 0x00, 0x0f, 0x00 };
+static u8 grdc_0d[] VAR16 = {
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x0f, 0xff };
+static u8 sequ_0e[] VAR16 = { 0x01, 0x0f, 0x00, 0x06 };
+static u8 crtc_0e[] VAR16 = {
+    0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0xbf, 0x1f,
+    0x00, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x9c, 0x8e, 0x8f, 0x28, 0x00, 0x96, 0xb9, 0xe3,
+    0xff };
+static u8 crtc_0f[] VAR16 = {
+    0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0xbf, 0x1f,
+    0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x83, 0x85, 0x5d, 0x28, 0x0f, 0x63, 0xba, 0xe3,
+    0xff };
+static u8 actl_0f[] VAR16 = {
+    0x00, 0x08, 0x00, 0x00, 0x18, 0x18, 0x00, 0x00,
+    0x00, 0x08, 0x00, 0x00, 0x00, 0x18, 0x00, 0x00,
+    0x01, 0x00, 0x01, 0x00 };
+static u8 actl_10[] VAR16 = {
+    0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x14, 0x07,
+    0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
+    0x01, 0x00, 0x0f, 0x00 };
+static u8 crtc_11[] VAR16 = {
+    0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0x0b, 0x3e,
+    0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0xea, 0x8c, 0xdf, 0x28, 0x00, 0xe7, 0x04, 0xe3,
+    0xff };
+static u8 actl_11[] VAR16 = {
+    0x00, 0x3f, 0x00, 0x3f, 0x00, 0x3f, 0x00, 0x3f,
+    0x00, 0x3f, 0x00, 0x3f, 0x00, 0x3f, 0x00, 0x3f,
+    0x01, 0x00, 0x0f, 0x00 };
+static u8 sequ_13[] VAR16 = { 0x01, 0x0f, 0x00, 0x0e };
+static u8 crtc_13[] VAR16 = {
+    0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0xbf, 0x1f,
+    0x00, 0x41, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x9c, 0x8e, 0x8f, 0x28, 0x40, 0x96, 0xb9, 0xa3,
+    0xff };
+static u8 actl_13[] VAR16 = {
+    0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
+    0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
+    0x41, 0x00, 0x0f, 0x00 };
+static u8 grdc_13[] VAR16 = {
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0f, 0xff };
+static u8 crtc_6A[] VAR16 = {
+    0x7f, 0x63, 0x63, 0x83, 0x6b, 0x1b, 0x72, 0xf0,
+    0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x59, 0x8d, 0x57, 0x32, 0x00, 0x57, 0x73, 0xe3,
+    0xff };
+
 
 /****************************************************************
  * Video mode list
@@ -385,23 +496,40 @@ static u8 palette3[] VAR16 = {
 #define VPARAM(x) &video_param_table[x]
 
 static struct vgamode_s vga_modes[] VAR16 = {
-    //mode vparam        model bits  sstart     pelm  dac
-    {0x00, VPARAM(0x17), CTEXT,   4, SEG_CTEXT, 0xFF, PAL(palette2)},
-    {0x01, VPARAM(0x17), CTEXT,   4, SEG_CTEXT, 0xFF, PAL(palette2)},
-    {0x02, VPARAM(0x18), CTEXT,   4, SEG_CTEXT, 0xFF, PAL(palette2)},
-    {0x03, VPARAM(0x18), CTEXT,   4, SEG_CTEXT, 0xFF, PAL(palette2)},
-    {0x04, VPARAM(0x04), CGA,     2, SEG_CTEXT, 0xFF, PAL(palette1)},
-    {0x05, VPARAM(0x05), CGA,     2, SEG_CTEXT, 0xFF, PAL(palette1)},
-    {0x06, VPARAM(0x06), CGA,     1, SEG_CTEXT, 0xFF, PAL(palette1)},
-    {0x07, VPARAM(0x07), MTEXT,   4, SEG_MTEXT, 0xFF, PAL(palette0)},
-    {0x0D, VPARAM(0x0d), PLANAR4, 4, SEG_GRAPH, 0xFF, PAL(palette1)},
-    {0x0E, VPARAM(0x0e), PLANAR4, 4, SEG_GRAPH, 0xFF, PAL(palette1)},
-    {0x0F, VPARAM(0x11), PLANAR1, 1, SEG_GRAPH, 0xFF, PAL(palette0)},
-    {0x10, VPARAM(0x12), PLANAR4, 4, SEG_GRAPH, 0xFF, PAL(palette2)},
-    {0x11, VPARAM(0x1a), PLANAR1, 1, SEG_GRAPH, 0xFF, PAL(palette2)},
-    {0x12, VPARAM(0x1b), PLANAR4, 4, SEG_GRAPH, 0xFF, PAL(palette2)},
-    {0x13, VPARAM(0x1c), LINEAR8, 8, SEG_GRAPH, 0xFF, PAL(palette3)},
-    {0x6A, VPARAM(0x1d), PLANAR4, 4, SEG_GRAPH, 0xFF, PAL(palette2)},
+    //mode model     tx  ty  ch bits sstart    slength vparam
+    // pelm  dac            sequ     misc  crtc     actl     grdc
+    {0x00, CTEXT,    40, 25, 16, 4, SEG_CTEXT, 0x0800, VPARAM(0x17)
+     , 0xFF, PAL(palette2), sequ_01, 0x67, crtc_01, actl_01, grdc_01 },
+    {0x01, CTEXT,    40, 25, 16, 4, SEG_CTEXT, 0x0800, VPARAM(0x17)
+     , 0xFF, PAL(palette2), sequ_01, 0x67, crtc_01, actl_01, grdc_01 },
+    {0x02, CTEXT,    80, 25, 16, 4, SEG_CTEXT, 0x1000, VPARAM(0x18)
+     , 0xFF, PAL(palette2), sequ_03, 0x67, crtc_03, actl_01, grdc_01 },
+    {0x03, CTEXT,    80, 25, 16, 4, SEG_CTEXT, 0x1000, VPARAM(0x18)
+     , 0xFF, PAL(palette2), sequ_03, 0x67, crtc_03, actl_01, grdc_01 },
+    {0x04, CGA,      40, 25,  8, 2, SEG_CTEXT, 0x0800, VPARAM(0x04)
+     , 0xFF, PAL(palette1), sequ_04, 0x63, crtc_04, actl_04, grdc_04},
+    {0x05, CGA,      40, 25,  8, 2, SEG_CTEXT, 0x0800, VPARAM(0x05)
+     , 0xFF, PAL(palette1), sequ_04, 0x63, crtc_04, actl_04, grdc_04},
+    {0x06, CGA,      80, 25,  8, 1, SEG_CTEXT, 0x1000, VPARAM(0x06)
+     , 0xFF, PAL(palette1), sequ_06, 0x63, crtc_06, actl_06, grdc_06},
+    {0x07, MTEXT,    80, 25, 16, 4, SEG_MTEXT, 0x1000, VPARAM(0x07)
+     , 0xFF, PAL(palette0), sequ_03, 0x66, crtc_07, actl_07, grdc_07},
+    {0x0D, PLANAR4,  40, 25,  8, 4, SEG_GRAPH, 0x2000, VPARAM(0x0d)
+     , 0xFF, PAL(palette1), sequ_0d, 0x63, crtc_0d, actl_0d, grdc_0d},
+    {0x0E, PLANAR4,  80, 25,  8, 4, SEG_GRAPH, 0x4000, VPARAM(0x0e)
+     , 0xFF, PAL(palette1), sequ_0e, 0x63, crtc_0e, actl_0d, grdc_0d},
+    {0x0F, PLANAR1,  80, 25, 14, 1, SEG_GRAPH, 0x8000, VPARAM(0x11)
+     , 0xFF, PAL(palette0), sequ_0e, 0xa3, crtc_0f, actl_0f, grdc_0d},
+    {0x10, PLANAR4,  80, 25, 14, 4, SEG_GRAPH, 0x8000, VPARAM(0x12)
+     , 0xFF, PAL(palette2), sequ_0e, 0xa3, crtc_0f, actl_10, grdc_0d},
+    {0x11, PLANAR1,  80, 30, 16, 1, SEG_GRAPH, 0x0000, VPARAM(0x1a)
+     , 0xFF, PAL(palette2), sequ_0e, 0xe3, crtc_11, actl_11, grdc_0d},
+    {0x12, PLANAR4,  80, 30, 16, 4, SEG_GRAPH, 0x0000, VPARAM(0x1b)
+     , 0xFF, PAL(palette2), sequ_0e, 0xe3, crtc_11, actl_10, grdc_0d},
+    {0x13, LINEAR8,  40, 25,  8, 8, SEG_GRAPH, 0x0000, VPARAM(0x1c)
+     , 0xFF, PAL(palette3), sequ_13, 0x63, crtc_13, actl_13, grdc_13},
+    {0x6A, PLANAR4, 100, 37, 16, 4, SEG_GRAPH, 0x0000, VPARAM(0x1d)
+     , 0xFF, PAL(palette2), sequ_0e, 0xe3, crtc_6A, actl_10, grdc_0d},
 };
 
 struct vgamode_s *
diff --git a/vgasrc/vgatables.h b/vgasrc/vgatables.h
index ef15b1d..9976745 100644
--- a/vgasrc/vgatables.h
+++ b/vgasrc/vgatables.h
@@ -95,13 +95,23 @@ struct VideoParam_s {
 
 struct vgamode_s {
     u8 svgamode;
-    struct VideoParam_s *vparam;
     u8 memmodel;    /* CTEXT,MTEXT,CGA,PL1,PL2,PL4,P8,P15,P16,P24,P32 */
+    u8 twidth;
+    u8 theight;
+    u8 cheight;
     u8 pixbits;
     u16 sstart;
+    u16 slength;
+    struct VideoParam_s *vparam;
+
     u8 pelmask;
     u8 *dac;
     u16 dacsize;
+    u8 *sequ_regs;
+    u8 miscreg;
+    u8 *crtc_regs;
+    u8 *actl_regs;
+    u8 *grdc_regs;
 };
 
 struct saveVideoHardware {