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author | Nils <njacobs8@adsltotaal.nl> | 2012-01-14 12:11:41 -0500 |
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committer | Kevin O'Connor <kevin@koconnor.net> | 2012-01-14 12:11:41 -0500 |
commit | 31eabf9ba842612e7c525489ab2a6b60bba10ea0 (patch) | |
tree | 1a10c2149b65fded51857e2b63d6f603f1d07841 /vgasrc/geodevga.h | |
parent | b93739776593eb470bd18ce8f8b028054cee0e3d (diff) | |
download | seabios-hppa-31eabf9ba842612e7c525489ab2a6b60bba10ea0.zip seabios-hppa-31eabf9ba842612e7c525489ab2a6b60bba10ea0.tar.gz seabios-hppa-31eabf9ba842612e7c525489ab2a6b60bba10ea0.tar.bz2 |
vgabios: Make the naming in the LX code generic to Geode.
Signed-off-by: Nils Jacobs <njacobs8 at adsltotaal.nl>
Diffstat (limited to 'vgasrc/geodevga.h')
-rw-r--r-- | vgasrc/geodevga.h | 81 |
1 files changed, 81 insertions, 0 deletions
diff --git a/vgasrc/geodevga.h b/vgasrc/geodevga.h new file mode 100644 index 0000000..1e51e1c --- /dev/null +++ b/vgasrc/geodevga.h @@ -0,0 +1,81 @@ +// Geode GX2/LX VGA functions +// +// Copyright (C) 2009 Chris Kindt +// +// Writen for Google Summer of Code 2009 for the coreboot project +// +// This file may be distributed under the terms of the GNU LGPLv3 license. + +#ifndef GEODEVGA_H +#define GEODEVGA_H + +#define VRC_INDEX 0xAC1C // Index register +#define VRC_DATA 0xAC1E // Data register +#define VR_UNLOCK 0xFC53 // Virtual register unlock code + +#define EXTENDED_REGISTER_LOCK 0x30 +#define EXTENDED_MODE_CONTROL 0x43 +#define EXTENDED_START_ADDR 0x44 + +#define CRTCE_UNLOCK 0x4c +#define CRTCE_LOCK 0xff + +// Graphics-specific registers: +#define OEM_BAR0 0x50 +#define OEM_BAR1 0x54 +#define OEM_BAR2 0x58 +#define OEM_BAR3 0x5C + +#define GEODE_PCI_ADDR 0x80000900 +#define GEODE_PCI_CMD (GEODE_PCI_ADDR + 0x04) +#define GEODE_PCI_FB (GEODE_PCI_ADDR + 0x10) +#define GEODE_PCI_DC (GEODE_PCI_ADDR + 0x18) +#define GEODE_PCI_VP (GEODE_PCI_ADDR + 0x1c) + +#define DC_LOCK_LOCK 0x00000000 +#define DC_LOCK_UNLOCK 0x00004758 + +/* LX MSRs */ +#define MSR_GLIU0 (1 << 28) +#define MSR_GLIU0_BASE4 (MSR_GLIU0 + 0x23) +#define GLIU0_IOD_BM_0 (MSR_GLIU0 + 0xE0) +#define GLIU0_IOD_BM_1 (MSR_GLIU0 + 0xE1) +#define DC_SPARE 0x80000011 +#define VP_MSR_CONFIG 0x48002001 + +/* DC REG OFFSET */ +#define DC_UNLOCK 0x0 +#define DC_GENERAL_CFG 0x4 +#define DC_DISPLAY_CFG 0x8 +#define DC_ARB_CFG 0xc +#define DC_FB_ST_OFFSET 0x10 +#define DC_CB_ST_OFFSET 0x14 +#define DC_CURS_ST_OFFSET 0x18 +#define DC_GLIU0_MEM_OFFSET 0x84 + +/* VP REG OFFSET */ +#define VP_VCFG 0x0 +#define VP_DCFG 0x8 +#define VP_MISC 0x50 + + +/* DC bits */ +#define DC_VGAE (1 << 7) +#define DC_GDEN (1 << 3) +#define DC_TRUP (1 << 6) + +/* VP bits */ +#define VP_CRT_EN (1 << 0) +#define VP_HSYNC_EN (1 << 1) +#define VP_VSYNC_EN (1 << 2) +#define VP_DAC_BL_EN (1 << 3) +#define VP_CRT_SKEW (1 << 16) +#define VP_BYP_BOTH (1 << 0) + +/* Masks */ +#define VP_MSR_CFG_MSK 0x0 +#define DC_CFG_MSK 0xf000a6 + +int geodevga_init(); + +#endif |