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author | Kevin O'Connor <kevin@koconnor.net> | 2008-05-18 02:42:58 -0400 |
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committer | Kevin O'Connor <kevin@koconnor.net> | 2008-05-18 02:42:58 -0400 |
commit | f64f0dbd521653db7138d7a9fdba4eeaf25f44a4 (patch) | |
tree | 05548ce733fc43c5f24e67bd5ccb3cf6d847da2a /src | |
parent | c143761594e4961c408be4866aa10ce2b64eebe7 (diff) | |
download | seabios-hppa-f64f0dbd521653db7138d7a9fdba4eeaf25f44a4.zip seabios-hppa-f64f0dbd521653db7138d7a9fdba4eeaf25f44a4.tar.gz seabios-hppa-f64f0dbd521653db7138d7a9fdba4eeaf25f44a4.tar.bz2 |
Initial support for coreboot.
Add new option for targetting a coreboot payload.
When in coreboot mode, configure out those parts of the code that wont
work on real hardware.
Don't include cmos.h in files that don't need it.
Diffstat (limited to 'src')
-rw-r--r-- | src/apm.c | 5 | ||||
-rw-r--r-- | src/ata.c | 24 | ||||
-rw-r--r-- | src/config.h | 3 | ||||
-rw-r--r-- | src/disk.c | 1 | ||||
-rw-r--r-- | src/post.c | 34 | ||||
-rw-r--r-- | src/rombios32.c | 5 | ||||
-rw-r--r-- | src/system.c | 1 |
7 files changed, 55 insertions, 18 deletions
@@ -14,6 +14,11 @@ static void out_str(const char *str_cs) { + if (CONFIG_COREBOOT) { + BX_INFO("APM request '%s'\n", str_cs); + return; + } + u8 *s = (u8*)str_cs; for (;;) { u8 c = GET_VAR(CS, *s); @@ -645,11 +645,25 @@ fill_fdpt(int driveid) static u8 get_translation(int driveid) { - u8 channel = driveid / 2; - u8 translation = inb_cmos(CMOS_BIOS_DISKTRANSFLAG + channel/2); - translation >>= 2 * (driveid % 4); - translation &= 0x03; - return translation; + if (! CONFIG_COREBOOT) { + // Emulators pass in the translation info via nvram. + u8 channel = driveid / 2; + u8 translation = inb_cmos(CMOS_BIOS_DISKTRANSFLAG + channel/2); + translation >>= 2 * (driveid % 4); + translation &= 0x03; + return translation; + } + + // On COREBOOT, use a heuristic to determine translation type. + u16 heads = GET_EBDA(ata.devices[driveid].pchs.heads); + u16 cylinders = GET_EBDA(ata.devices[driveid].pchs.cylinders); + u16 spt = GET_EBDA(ata.devices[driveid].pchs.spt); + + if (cylinders <= 1024 && heads <= 16 && spt <= 63) + return ATA_TRANSLATION_NONE; + if (cylinders * heads <= 131072) + return ATA_TRANSLATION_LARGE; + return ATA_TRANSLATION_LBA; } static void diff --git a/src/config.h b/src/config.h index c7ec67e..4ae23dc 100644 --- a/src/config.h +++ b/src/config.h @@ -13,6 +13,9 @@ #define CONFIG_APPNAME "Bochs" #endif +// Configure as a payload coreboot payload. +#define CONFIG_COREBOOT 0 + #define CONFIG_DEBUG_SERIAL 0 #define CONFIG_FLOPPY_SUPPORT 1 @@ -8,7 +8,6 @@ #include "disk.h" // floppy_13 #include "biosvar.h" // struct bregs #include "config.h" // CONFIG_* -#include "cmos.h" // inb_cmos #include "util.h" // debug_enter #include "ata.h" // ATA_* @@ -80,14 +80,21 @@ init_ebda() static void ram_probe(void) { - u32 rs = (inb_cmos(CMOS_MEM_EXTMEM2_LOW) + u32 rs; + if (CONFIG_COREBOOT) { + // XXX - just hardcode for now. + rs = 128*1024*1024; + } else { + // On emulators, get memory size from nvram. + rs = (inb_cmos(CMOS_MEM_EXTMEM2_LOW) | (inb_cmos(CMOS_MEM_EXTMEM2_HIGH) << 8)) * 65536; - if (rs) - rs += 16 * 1024 * 1024; - else - rs = ((inb_cmos(CMOS_MEM_EXTMEM_LOW) - | (inb_cmos(CMOS_MEM_EXTMEM_HIGH) << 8)) * 1024 - + 1 * 1024 * 1024); + if (rs) + rs += 16 * 1024 * 1024; + else + rs = ((inb_cmos(CMOS_MEM_EXTMEM_LOW) + | (inb_cmos(CMOS_MEM_EXTMEM_HIGH) << 8)) * 1024 + + 1 * 1024 * 1024); + } SET_EBDA(ram_size, rs); BX_INFO("ram_size=0x%08x\n", rs); @@ -131,10 +138,17 @@ init_boot_vectors() ebda->ipl.count = ip - ebda->ipl.table; ebda->ipl.sequence = 0xffff; - ebda->ipl.bootorder = (inb_cmos(CMOS_BIOS_BOOTFLAG2) - | ((inb_cmos(CMOS_BIOS_BOOTFLAG1) & 0xf0) << 4)); - if (!(inb_cmos(CMOS_BIOS_BOOTFLAG1) & 1)) + if (CONFIG_COREBOOT) { + // XXX - hardcode defaults for coreboot. + ebda->ipl.bootorder = 0x00000231; ebda->ipl.checkfloppysig = 1; + } else { + // On emulators, get boot order from nvram. + ebda->ipl.bootorder = (inb_cmos(CMOS_BIOS_BOOTFLAG2) + | ((inb_cmos(CMOS_BIOS_BOOTFLAG1) & 0xf0) << 4)); + if (!(inb_cmos(CMOS_BIOS_BOOTFLAG1) & 1)) + ebda->ipl.checkfloppysig = 1; + } } static void diff --git a/src/rombios32.c b/src/rombios32.c index 4db3465..fde32a9 100644 --- a/src/rombios32.c +++ b/src/rombios32.c @@ -18,7 +18,6 @@ // Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA #include "util.h" // BX_INFO -#include "cmos.h" // inb_cmos #include "pci.h" // PCIDevice #include "types.h" // u32 #include "config.h" // CONFIG_* @@ -1668,6 +1667,10 @@ void smbios_init(void) void rombios32_init(void) { + if (CONFIG_COREBOOT) + // XXX - not supported on coreboot yet. + return; + BX_INFO("Starting rombios32\n"); #if (CONFIG_USE_EBDA_TABLES == 1) diff --git a/src/system.c b/src/system.c index 68fbf54..72c0735 100644 --- a/src/system.c +++ b/src/system.c @@ -8,7 +8,6 @@ #include "util.h" // irq_restore #include "biosvar.h" // BIOS_CONFIG_TABLE #include "ioport.h" // inb -#include "cmos.h" // inb_cmos #define E820_RAM 1 #define E820_RESERVED 2 |