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| author | Kevin O'Connor <kevin@koconnor.net> | 2013-01-21 12:14:29 -0500 |
|---|---|---|
| committer | Kevin O'Connor <kevin@koconnor.net> | 2013-02-07 21:48:35 -0500 |
| commit | 9e4d41cd7c157a1d7037b06f9d830a7dfc6d1441 (patch) | |
| tree | 4b1dcd270fd93bc664039e9c50fd500fadadfcd9 /src/resume.c | |
| parent | 6ca0460fbb8ecfa5d42c8928b7ee71f20d0cffdb (diff) | |
| download | seabios-hppa-9e4d41cd7c157a1d7037b06f9d830a7dfc6d1441.zip seabios-hppa-9e4d41cd7c157a1d7037b06f9d830a7dfc6d1441.tar.gz seabios-hppa-9e4d41cd7c157a1d7037b06f9d830a7dfc6d1441.tar.bz2 | |
POST: Move cpu caching and dma setup to platform_hardware_setup().
The CPU cache is enabled and DMA is disabled on all real-world POST
entry situations, so no need to do this in the low-level "pre-init"
phase. Instead, move it to the platform hardware setup stage.
Also, move the setting of the reboot flags (which control reset-vector
entry point handling) to ivt_init().
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Diffstat (limited to 'src/resume.c')
| -rw-r--r-- | src/resume.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/resume.c b/src/resume.c index 99265cd..ffc84fc 100644 --- a/src/resume.c +++ b/src/resume.c @@ -19,7 +19,7 @@ int HaveRunPost VAR16VISIBLE; // Reset DMA controller void -dma_preinit(void) +dma_setup(void) { // first reset the DMA controllers outb(0, PORT_DMA1_MASTER_CLEAR); @@ -40,7 +40,7 @@ handle_resume(void) outb_cmos(0, CMOS_RESET_CODE); dprintf(1, "In resume (status=%d)\n", status); - dma_preinit(); + dma_setup(); switch (status) { case 0x01 ... 0x04: |