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authorKevin O'Connor <kevin@koconnor.net>2008-06-21 12:24:14 -0400
committerKevin O'Connor <kevin@koconnor.net>2008-06-21 12:24:14 -0400
commitc541e1bebde711975477f2314106d7b0799fccd7 (patch)
treec80d863b2d1773e0d44e89db1b276a049cb605ef /src/pic.h
parent61d6b06696b7efc6e6bc1df6573ba58e743d6ae3 (diff)
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Add code (currently disabled) to mask run away irqs.
Add handler that can react to any unknown hardware irq by masking that irq. This can be useful for finding/fixing run away irq issues. Don't currently register these hardware irq handlers Also, sort and improve default debug levels for bios handlers.
Diffstat (limited to 'src/pic.h')
-rw-r--r--src/pic.h37
1 files changed, 19 insertions, 18 deletions
diff --git a/src/pic.h b/src/pic.h
index dc151a2..8775191 100644
--- a/src/pic.h
+++ b/src/pic.h
@@ -49,6 +49,18 @@ unmask_pic2(u8 irq)
outb(inb(PORT_PIC2_DATA) & ~irq, PORT_PIC2_DATA);
}
+static inline void
+mask_pic1(u8 irq)
+{
+ outb(inb(PORT_PIC1_DATA) | irq, PORT_PIC1_DATA);
+}
+
+static inline void
+mask_pic2(u8 irq)
+{
+ outb(inb(PORT_PIC2_DATA) | irq, PORT_PIC2_DATA);
+}
+
static inline u8
get_pic1_isr()
{
@@ -57,25 +69,14 @@ get_pic1_isr()
return inb(PORT_PIC1_CMD);
}
-static inline void
-pic_setup()
+static inline u8
+get_pic2_isr()
{
- dprintf(3, "init pic\n");
- // Send ICW1 (select OCW1 + will send ICW4)
- outb(0x11, PORT_PIC1_CMD);
- outb(0x11, PORT_PIC2_CMD);
- // Send ICW2 (base irqs: 0x08-0x0f for irq0-7, 0x70-0x78 for irq8-15)
- outb(0x08, PORT_PIC1_DATA);
- outb(0x70, PORT_PIC2_DATA);
- // Send ICW3 (cascaded pic ids)
- outb(0x04, PORT_PIC1_DATA);
- outb(0x02, PORT_PIC2_DATA);
- // Send ICW4 (enable 8086 mode)
- outb(0x01, PORT_PIC1_DATA);
- outb(0x01, PORT_PIC2_DATA);
- // Mask all irqs (except cascaded PIC2 irq)
- outb(~PIC1_IRQ2, PORT_PIC1_DATA);
- outb(~0, PORT_PIC2_DATA);
+ // 0x0b == select OCW1 + read ISR
+ outb(0x0b, PORT_PIC2_CMD);
+ return inb(PORT_PIC2_CMD);
}
+void pic_setup();
+
#endif // pic.h