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author | Kevin O'Connor <kevin@koconnor.net> | 2011-06-19 10:03:08 -0400 |
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committer | Kevin O'Connor <kevin@koconnor.net> | 2011-06-19 10:10:43 -0400 |
commit | b9457ec8818db62cf13cbcc791103720e5730edb (patch) | |
tree | a9d3a238f19bb4efb0dd6911be83c8374ab9cc43 /src/ata.c | |
parent | 927d16e576511cf14241e850028abec7d007f203 (diff) | |
download | seabios-hppa-b9457ec8818db62cf13cbcc791103720e5730edb.zip seabios-hppa-b9457ec8818db62cf13cbcc791103720e5730edb.tar.gz seabios-hppa-b9457ec8818db62cf13cbcc791103720e5730edb.tar.bz2 |
Add support for white-listing AHCI controllers as ATA compatible.
To start, register the AMD ATA controller on the A50M chipset as
compatible with ATA mode even if it comes up in AHCI mode.
Diffstat (limited to 'src/ata.c')
-rw-r--r-- | src/ata.c | 22 |
1 files changed, 19 insertions, 3 deletions
@@ -965,10 +965,9 @@ init_controller(int bdf, int irq, u32 port1, u32 port2, u32 master) // Handle controllers on an ATA PCI device. static void -init_pciata(u16 bdf, void *arg) +init_pciata(u16 bdf, u8 prog_if) { u8 pciirq = pci_config_readb(bdf, PCI_INTERRUPT_LINE); - u8 prog_if = pci_config_readb(bdf, PCI_CLASS_PROG); int master = 0; if (CONFIG_ATA_DMA && prog_if & 0x80) { // Check for bus-mastering. @@ -1007,8 +1006,25 @@ init_pciata(u16 bdf, void *arg) init_controller(bdf, irq, port1, port2, master ? master + 8 : 0); } +static void +found_genericata(u16 bdf, void *arg) +{ + init_pciata(bdf, pci_config_readb(bdf, PCI_CLASS_PROG)); +} + +static void +found_compatibleahci(u16 bdf, void *arg) +{ + if (CONFIG_AHCI) + // Already handled directly via native ahci interface. + return; + init_pciata(bdf, 0x8f); +} + static const struct pci_device_id pci_ata_tbl[] = { - PCI_DEVICE_CLASS(PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_STORAGE_IDE, init_pciata), + PCI_DEVICE_CLASS(PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_STORAGE_IDE + , found_genericata), + PCI_DEVICE(PCI_VENDOR_ID_ATI, 0x4391, found_compatibleahci), PCI_DEVICE_END, }; |