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author | Kevin O'Connor <kevin@koconnor.net> | 2008-11-28 11:56:37 -0500 |
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committer | Kevin O'Connor <kevin@koconnor.net> | 2008-11-28 11:56:37 -0500 |
commit | cf89e66e88cc9e6cdb03a9d296827bd7d246a412 (patch) | |
tree | 3d29e716e39d9d3678333bcfa0a4833f2aa5234f | |
parent | d21c089acf7016bb22ab81a96c5e20ca8075e3ea (diff) | |
download | seabios-hppa-cf89e66e88cc9e6cdb03a9d296827bd7d246a412.zip seabios-hppa-cf89e66e88cc9e6cdb03a9d296827bd7d246a412.tar.gz seabios-hppa-cf89e66e88cc9e6cdb03a9d296827bd7d246a412.tar.bz2 |
Fix bug - bios writes must be enabled before max PCI bus detected.
The max pci bus is stored in the bios segment, so it must be writable.
So, use a default max size (1 pci bus) for the initial write enable
device scan and then do the full max bus check after write is
enabled.
-rw-r--r-- | src/pci.c | 2 | ||||
-rw-r--r-- | src/post.c | 4 |
2 files changed, 3 insertions, 3 deletions
@@ -49,7 +49,7 @@ u8 pci_config_readb(u16 bdf, u32 addr) } #if MODE16 -int MaxBDF VISIBLE16; +int MaxBDF VISIBLE16 = 0x0100; #endif // Find the maximum bus number. @@ -195,6 +195,8 @@ post() timer_setup(); mathcp_setup(); + pci_bus_setup(); + memmap_setup(); ram_probe(); @@ -276,8 +278,6 @@ _start() debug_serial_setup(); dprintf(1, "Start bios\n"); - pci_bus_setup(); - // Setup for .bss and .data sections make_bios_writable(); clear_bss(); |