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authorChristian Iversen <ci@iversenit.dk>2020-05-04 16:15:13 +0200
committerMichael Brown <mcb30@ipxe.org>2021-01-28 17:14:08 +0000
commit36a892a7c719aed3fd00fc838140b8d24bbb708a (patch)
treef46abc505182e7b8f20f816fdd60775b4a61b59c
parent414c842f06038e1979e4fcb5bc7b718e7dad6ca4 (diff)
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[arbel] Clean up whitespace in MT25218_PRM.h header
Signed-off-by: Christian Iversen <ci@iversenit.dk>
-rw-r--r--src/drivers/infiniband/MT25218_PRM.h176
1 files changed, 88 insertions, 88 deletions
diff --git a/src/drivers/infiniband/MT25218_PRM.h b/src/drivers/infiniband/MT25218_PRM.h
index 4011bd0..c4dc331 100644
--- a/src/drivers/infiniband/MT25218_PRM.h
+++ b/src/drivers/infiniband/MT25218_PRM.h
@@ -73,7 +73,7 @@ struct arbelprm_ud_address_vector_st { /* Little Endian */
/* -------------- */
pseudo_bit_t rgid_31_0[0x00020]; /* Remote GID[31:0] if G bit is set. Must be set to 0x2 if G bit is cleared. */
/* -------------- */
-};
+};
/* Send doorbell */
@@ -88,7 +88,7 @@ struct arbelprm_send_doorbell_st { /* Little Endian */
pseudo_bit_t reserved1[0x00002];
pseudo_bit_t qpn[0x00018]; /* QP number this doorbell is rung on */
/* -------------- */
-};
+};
/* ACCESS_LAM_inject_errors_input_modifier */
@@ -102,7 +102,7 @@ struct arbelprm_access_lam_inject_errors_input_modifier_st { /* Little Endian */
pseudo_bit_t index0[0x00007];
pseudo_bit_t q0[0x00001];
/* -------------- */
-};
+};
/* ACCESS_LAM_inject_errors_input_parameter */
@@ -114,7 +114,7 @@ struct arbelprm_access_lam_inject_errors_input_parameter_st { /* Little Endian *
pseudo_bit_t ra[0x00010]; /* Row Address */
pseudo_bit_t ca[0x00010]; /* Column Address */
/* -------------- */
-};
+};
/* */
@@ -127,7 +127,7 @@ struct arbelprm_recv_wqe_segment_next_st { /* Little Endian */
*/
pseudo_bit_t reserved1[0x0001a];
/* -------------- */
-};
+};
/* Send wqe segment data inline */
@@ -141,7 +141,7 @@ struct arbelprm_wqe_segment_data_inline_st { /* Little Endian */
/* -------------- */
pseudo_bit_t reserved2[0x00040];
/* -------------- */
-};
+};
/* Send wqe segment data ptr */
@@ -155,7 +155,7 @@ struct arbelprm_wqe_segment_data_ptr_st { /* Little Endian */
/* -------------- */
pseudo_bit_t local_address_l[0x00020];
/* -------------- */
-};
+};
/* Send wqe segment rd */
@@ -167,7 +167,7 @@ struct arbelprm_local_invalidate_segment_st { /* Little Endian */
/* -------------- */
pseudo_bit_t reserved2[0x000a0];
/* -------------- */
-};
+};
/* Fast_Registration_Segment */
@@ -197,7 +197,7 @@ struct arbelprm_fast_registration_segment_st { /* Little Endian */
/* -------------- */
pseudo_bit_t reg_len_l[0x00020]; /* Region Length[31:0] */
/* -------------- */
-};
+};
/* Send wqe segment atomic */
@@ -210,7 +210,7 @@ struct arbelprm_wqe_segment_atomic_st { /* Little Endian */
/* -------------- */
pseudo_bit_t compare_l[0x00020];
/* -------------- */
-};
+};
/* Send wqe segment remote address */
@@ -223,7 +223,7 @@ struct arbelprm_wqe_segment_remote_address_st { /* Little Endian */
/* -------------- */
pseudo_bit_t reserved0[0x00020];
/* -------------- */
-};
+};
/* end wqe segment bind */
@@ -253,7 +253,7 @@ struct arbelprm_wqe_segment_bind_st { /* Little Endian */
/* -------------- */
pseudo_bit_t length_l[0x00020];
/* -------------- */
-};
+};
/* Send wqe segment ud */
@@ -267,7 +267,7 @@ struct arbelprm_wqe_segment_ud_st { /* Little Endian */
/* -------------- */
pseudo_bit_t reserved1[0x00040];
/* -------------- */
-};
+};
/* Send wqe segment rd */
@@ -279,7 +279,7 @@ struct arbelprm_wqe_segment_rd_st { /* Little Endian */
/* -------------- */
pseudo_bit_t reserved1[0x00040];
/* -------------- */
-};
+};
/* Send wqe segment ctrl */
@@ -296,7 +296,7 @@ struct arbelprm_wqe_segment_ctrl_send_st { /* Little Endian */
/* -------------- */
pseudo_bit_t immediate[0x00020]; /* If the OpCode encodes an operation with Immediate (RDMA-write/SEND), This field will hold the Immediate data to be sent. If the OpCode encodes send and invalidate operations, this field holds the Invalidation key to be inserted into the packet; otherwise, this field is reserved. */
/* -------------- */
-};
+};
/* Send wqe segment next */
@@ -338,7 +338,7 @@ struct arbelprm_wqe_segment_next_st { /* Little Endian */
pseudo_bit_t always1[0x00001];
pseudo_bit_t reserved1[0x00018];
/* -------------- */
-};
+};
/* Address Path */
@@ -384,7 +384,7 @@ struct arbelprm_address_path_st { /* Little Endian */
/* -------------- */
pseudo_bit_t rgid_31_0[0x00020]; /* Remote GID[31:0] */
/* -------------- */
-};
+};
/* HCA Command Register (HCR) */
@@ -414,7 +414,7 @@ struct arbelprm_hca_command_register_st { /* Little Endian */
pseudo_bit_t status[0x00008]; /* Command execution status report. Valid only if command interface in under SW ownership (Go bit is cleared)
0 - command completed without error. If different than zero, command execution completed with error. Syndrom encoding is depended on command executed and is defined for each command */
/* -------------- */
-};
+};
/* CQ Doorbell */
@@ -435,7 +435,7 @@ struct arbelprm_cq_cmd_doorbell_st { /* Little Endian */
/* -------------- */
pseudo_bit_t cq_param[0x00020]; /* parameter to be used by CQ command */
/* -------------- */
-};
+};
/* RD-send doorbell */
@@ -449,7 +449,7 @@ struct arbelprm_rd_send_doorbell_st { /* Little Endian */
/* -------------- */
struct arbelprm_send_doorbell_st send_doorbell;/* Send Parameters */
/* -------------- */
-};
+};
/* Multicast Group Member QP */
@@ -458,7 +458,7 @@ struct arbelprm_mgmqp_st { /* Little Endian */
pseudo_bit_t reserved0[0x00007];
pseudo_bit_t qi[0x00001]; /* Qi: QPN_i is valid */
/* -------------- */
-};
+};
/* vsd */
@@ -575,7 +575,7 @@ struct arbelprm_vsd_st { /* Little Endian */
/* -------------- */
pseudo_bit_t vsd_dw55[0x00020];
/* -------------- */
-};
+};
/* ACCESS_LAM_inject_errors */
@@ -586,7 +586,7 @@ struct arbelprm_access_lam_inject_errors_st { /* Little Endian */
/* -------------- */
pseudo_bit_t reserved0[0x00020];
/* -------------- */
-};
+};
/* Logical DIMM Information */
@@ -626,7 +626,7 @@ struct arbelprm_dimminfo_st { /* Little Endian */
/* -------------- */
pseudo_bit_t reserved4[0x00040];
/* -------------- */
-};
+};
/* UAR Parameters */
@@ -661,7 +661,7 @@ struct arbelprm_uar_params_st { /* Little Endian */
Number of entries in table is 2^log_max_uars.
Table must be aligned to its size. */
/* -------------- */
-};
+};
/* Translation and Protection Tables Parameters */
@@ -695,7 +695,7 @@ struct arbelprm_tptparams_st { /* Little Endian */
/* -------------- */
pseudo_bit_t reserved3[0x00040];
/* -------------- */
-};
+};
/* Multicast Support Parameters */
@@ -729,7 +729,7 @@ struct arbelprm_multicastparam_st { /* Little Endian */
/* -------------- */
pseudo_bit_t reserved5[0x00020];
/* -------------- */
-};
+};
/* QPC/EEC/CQC/EQC/RDB Parameters */
@@ -821,7 +821,7 @@ struct arbelprm_qpcbaseaddr_st { /* Little Endian */
/* -------------- */
pseudo_bit_t reserved10[0x00040];
/* -------------- */
-};
+};
/* Header_Log_Register */
@@ -830,7 +830,7 @@ struct arbelprm_header_log_register_st { /* Little Endian */
/* -------------- */
pseudo_bit_t reserved0[0x00060];
/* -------------- */
-};
+};
/* Performance Monitors */
@@ -862,7 +862,7 @@ struct arbelprm_performance_monitors_st { /* Little Endian */
/* -------------- */
pseudo_bit_t event_counter2[0x00020];/* Read/write event counter, counting events specified by EvCntl and EvCnt2 fields repsectively. When the event counter reaches is maximum value of 0xFFFFFF, the next event will cause it to roll over to zero, set F1 or F2 bit respectively and generate interrupt by I1 I2 bit respectively. */
/* -------------- */
-};
+};
/* Receive segment format */
@@ -876,7 +876,7 @@ struct arbelprm_wqe_segment_ctrl_recv_st { /* Little Endian */
/* -------------- */
pseudo_bit_t reserved4[0x00020];
/* -------------- */
-};
+};
/* MLX WQE segment format */
@@ -895,7 +895,7 @@ struct arbelprm_wqe_segment_ctrl_mlx_st { /* Little Endian */
pseudo_bit_t vcrc[0x00010]; /* Packet's VCRC (if not 0 - otherwise computed by HW) */
pseudo_bit_t rlid[0x00010]; /* Destination LID (must match given headers) */
/* -------------- */
-};
+};
/* Send WQE segment format */
@@ -926,7 +926,7 @@ struct arbelprm_send_wqe_segment_st { /* Little Endian */
/* -------------- */
pseudo_bit_t reserved1[0x00200];
/* -------------- */
-};
+};
/* QP and EE Context Entry */
@@ -1118,7 +1118,7 @@ struct arbelprm_queue_pair_ee_context_entry_st { /* Little Endian */
/* -------------- */
pseudo_bit_t reserved33[0x00040];
/* -------------- */
-};
+};
/* Clear Interrupt [63:0] */
@@ -1132,7 +1132,7 @@ struct arbelprm_clr_int_st { /* Little Endian */
Write transactions to this register will clear (de-assert) the virtual interrupt output pins of InfiniHost-III-EX. The value to be written in this register is obtained by executing QUERY_ADAPTER command on command interface after system boot.
This register is write-only. Reading from this register will cause undefined result */
/* -------------- */
-};
+};
/* EQ_Arm_DB_Region */
@@ -1143,7 +1143,7 @@ struct arbelprm_eq_arm_db_region_st { /* Little Endian */
pseudo_bit_t eq_x_arm_l[0x00020]; /* EQ[31:0] X state.
This register is used to Arm EQs when setting the appropriate bits. */
/* -------------- */
-};
+};
/* EQ Set CI DBs Table */
@@ -1404,7 +1404,7 @@ struct arbelprm_eq_set_ci_table_st { /* Little Endian */
/* -------------- */
pseudo_bit_t reserved63[0x00020];
/* -------------- */
-};
+};
/* InfiniHost-III-EX Configuration Registers */
@@ -1415,7 +1415,7 @@ struct arbelprm_configuration_registers_st { /* Little Endian */
/* -------------- */
pseudo_bit_t reserved1[0x3fcb20];
/* -------------- */
-};
+};
/* QP_DB_Record */
@@ -1429,7 +1429,7 @@ struct arbelprm_qp_db_record_st { /* Little Endian */
0x5 for SRQ */
pseudo_bit_t qp_number[0x00018]; /* QP number */
/* -------------- */
-};
+};
/* CQ_ARM_DB_Record */
@@ -1445,7 +1445,7 @@ struct arbelprm_cq_arm_db_record_st { /* Little Endian */
pseudo_bit_t res[0x00003]; /* Must be 0x2 */
pseudo_bit_t cq_number[0x00018]; /* CQ number */
/* -------------- */
-};
+};
/* CQ_CI_DB_Record */
@@ -1456,7 +1456,7 @@ struct arbelprm_cq_ci_db_record_st { /* Little Endian */
pseudo_bit_t res[0x00003]; /* Must be 0x1 */
pseudo_bit_t cq_number[0x00018]; /* CQ number */
/* -------------- */
-};
+};
/* Virtual_Physical_Mapping */
@@ -1472,7 +1472,7 @@ struct arbelprm_virtual_physical_mapping_st { /* Little Endian */
pseudo_bit_t reserved1[0x00006];
pseudo_bit_t pa_l[0x00014]; /* Physical Address[31:12] */
/* -------------- */
-};
+};
/* MOD_STAT_CFG */
@@ -1485,7 +1485,7 @@ struct arbelprm_mod_stat_cfg_st { /* Little Endian */
/* -------------- */
pseudo_bit_t reserved2[0x007e0];
/* -------------- */
-};
+};
/* SRQ Context */
@@ -1528,7 +1528,7 @@ struct arbelprm_srq_context_st { /* Little Endian */
/* -------------- */
pseudo_bit_t reserved4[0x00060];
/* -------------- */
-};
+};
/* PBL */
@@ -1549,7 +1549,7 @@ struct arbelprm_pbl_st { /* Little Endian */
/* -------------- */
pseudo_bit_t mtt_3_l[0x00020]; /* Fourth MTT[31:0] */
/* -------------- */
-};
+};
/* Performance Counters */
@@ -1580,7 +1580,7 @@ struct arbelprm_performance_counters_st { /* Little Endian */
/* -------------- */
pseudo_bit_t reserved3[0x00620];
/* -------------- */
-};
+};
/* Transport and CI Error Counters */
@@ -1724,7 +1724,7 @@ struct arbelprm_transport_and_ci_error_counters_st { /* Little Endian */
/* -------------- */
pseudo_bit_t reserved12[0x002a0];
/* -------------- */
-};
+};
/* Event_data Field - HCR Completion Event */
@@ -1743,7 +1743,7 @@ struct arbelprm_hcr_completion_event_st { /* Little Endian */
/* -------------- */
pseudo_bit_t reserved3[0x00020];
/* -------------- */
-};
+};
/* Completion with Error CQE */
@@ -1791,7 +1791,7 @@ struct arbelprm_completion_with_error_st { /* Little Endian */
0xFE - For completion with error on Receive Queues
0xFF - For completion with error on Send Queues */
/* -------------- */
-};
+};
/* Resize CQ Input Mailbox */
@@ -1814,7 +1814,7 @@ struct arbelprm_resize_cq_st { /* Little Endian */
/* -------------- */
pseudo_bit_t reserved4[0x00100];
/* -------------- */
-};
+};
/* MAD_IFC Input Modifier */
@@ -1826,7 +1826,7 @@ struct arbelprm_mad_ifc_input_modifier_st { /* Little Endian */
pseudo_bit_t rlid[0x00010]; /* Remote (source) LID from the received MAD.
This field is required for trap generation upon MKey/BKey validation. */
/* -------------- */
-};
+};
/* MAD_IFC Input Mailbox */
@@ -1863,7 +1863,7 @@ struct arbelprm_mad_ifc_st { /* Little Endian */
/* -------------- */
pseudo_bit_t reserved5[0x004c0];
/* -------------- */
-};
+};
/* Query Debug Message */
@@ -1924,7 +1924,7 @@ struct arbelprm_query_debug_msg_st { /* Little Endian */
/* -------------- */
pseudo_bit_t reserved3[0x00400];
/* -------------- */
-};
+};
/* User Access Region */
@@ -1939,7 +1939,7 @@ struct arbelprm_uar_st { /* Little Endian */
/* -------------- */
pseudo_bit_t reserved1[0x03ec0];
/* -------------- */
-};
+};
/* Receive doorbell */
@@ -1953,7 +1953,7 @@ struct arbelprm_receive_doorbell_st { /* Little Endian */
pseudo_bit_t reserved3[0x00002];
pseudo_bit_t qpn[0x00018]; /* QP number or SRQ number this doorbell is rung on */
/* -------------- */
-};
+};
/* SET_IB Parameters */
@@ -1974,7 +1974,7 @@ struct arbelprm_set_ib_st { /* Little Endian */
/* -------------- */
pseudo_bit_t reserved2[0x00180];
/* -------------- */
-};
+};
/* Multicast Group Member */
@@ -2014,7 +2014,7 @@ struct arbelprm_mgm_entry_st { /* Little Endian */
/* -------------- */
struct arbelprm_mgmqp_st mgmqp_7; /* Multicast Group Member QP */
/* -------------- */
-};
+};
/* INIT_IB Parameters */
@@ -2068,7 +2068,7 @@ struct arbelprm_init_ib_st { /* Little Endian */
/* -------------- */
pseudo_bit_t reserved5[0x006c0];
/* -------------- */
-};
+};
/* Query Device Limitations */
@@ -2285,7 +2285,7 @@ struct arbelprm_query_dev_lim_st { /* Little Endian */
/* -------------- */
pseudo_bit_t reserved41[0x002c0];
/* -------------- */
-};
+};
/* QUERY_ADAPTER Parameters Block */
@@ -2299,7 +2299,7 @@ struct arbelprm_query_adapter_st { /* Little Endian */
/* -------------- */
struct arbelprm_vsd_st vsd;
/* -------------- */
-};
+};
/* QUERY_FW Parameters Block */
@@ -2375,7 +2375,7 @@ struct arbelprm_query_fw_st { /* Little Endian */
/* -------------- */
pseudo_bit_t reserved6[0x004c0];
/* -------------- */
-};
+};
/* ACCESS_LAM */
@@ -2384,7 +2384,7 @@ struct arbelprm_access_lam_st { /* Little Endian */
/* -------------- */
pseudo_bit_t reserved0[0x00080];
/* -------------- */
-};
+};
/* ENABLE_LAM Parameters Block */
@@ -2418,7 +2418,7 @@ struct arbelprm_enable_lam_st { /* Little Endian */
/* -------------- */
pseudo_bit_t reserved2[0x00400];
/* -------------- */
-};
+};
/* Memory Access Parameters for UD Address Vector Table */
@@ -2430,7 +2430,7 @@ struct arbelprm_udavtable_memory_parameters_st { /* Little Endian */
pseudo_bit_t xlation_en[0x00001]; /* When cleared, address is physical address and no translation will be done. When set, address is virtual. */
pseudo_bit_t reserved1[0x00002];
/* -------------- */
-};
+};
/* INIT_HCA & QUERY_HCA Parameters Block */
@@ -2495,7 +2495,7 @@ struct arbelprm_init_hca_st { /* Little Endian */
/* -------------- */
pseudo_bit_t reserved11[0x00600];
/* -------------- */
-};
+};
/* Event Queue Context Table Entry */
@@ -2555,7 +2555,7 @@ struct arbelprm_eqc_st { /* Little Endian */
/* -------------- */
pseudo_bit_t reserved9[0x00080];
/* -------------- */
-};
+};
/* Memory Translation Table (MTT) Entry */
@@ -2566,7 +2566,7 @@ struct arbelprm_mtt_st { /* Little Endian */
pseudo_bit_t reserved0[0x0000b];
pseudo_bit_t ptag_l[0x00014]; /* Low-order bits of Physical tag. The size of the field depends on the page size of the region. Maximum PTAG size is 52 bits. */
/* -------------- */
-};
+};
/* Memory Protection Table (MPT) Entry */
@@ -2641,7 +2641,7 @@ struct arbelprm_mpt_st { /* Little Endian */
/* -------------- */
pseudo_bit_t reserved8[0x00040];
/* -------------- */
-};
+};
/* Completion Queue Context Table Entry */
@@ -2719,7 +2719,7 @@ struct arbelprm_completion_queue_context_st { /* Little Endian */
/* -------------- */
pseudo_bit_t reserved8[0x00020];
/* -------------- */
-};
+};
/* GPIO_event_data */
@@ -2732,7 +2732,7 @@ struct arbelprm_gpio_event_data_st { /* Little Endian */
/* -------------- */
pseudo_bit_t reserved1[0x00020];
/* -------------- */
-};
+};
/* Event_data Field - QP/EE Events */
@@ -2749,7 +2749,7 @@ struct arbelprm_qp_ee_event_st { /* Little Endian */
/* -------------- */
pseudo_bit_t reserved4[0x00060];
/* -------------- */
-};
+};
/* InfiniHost-III-EX Type0 Configuration Header */
@@ -2947,7 +2947,7 @@ struct arbelprm_mt25208_type0_st { /* Little Endian */
/* -------------- */
pseudo_bit_t reserved13[0x006a0];
/* -------------- */
-};
+};
/* Event Data Field - Performance Monitor */
@@ -2965,7 +2965,7 @@ struct arbelprm_performance_monitor_event_st { /* Little Endian */
/* -------------- */
pseudo_bit_t reserved1[0x00040];
/* -------------- */
-};
+};
/* Event_data Field - Page Faults */
@@ -2989,7 +2989,7 @@ struct arbelprm_page_fault_event_data_st { /* Little Endian */
/* -------------- */
pseudo_bit_t prefetch_len[0x00020]; /* Indicates how many subsequent pages in the same memory region/window will be accessed by the following transaction after this page fault is resolved. measured in bytes. SW can use this information in order to page-in the subsequent pages if they are not present. */
/* -------------- */
-};
+};
/* WQE segments format */
@@ -3006,7 +3006,7 @@ struct arbelprm_wqe_segment_st { /* Little Endian */
/* -------------- */
pseudo_bit_t reserved2[0x00080];
/* -------------- */
-};
+};
/* Event_data Field - Port State Change */
@@ -3019,7 +3019,7 @@ struct arbelprm_port_state_change_st { /* Little Endian */
/* -------------- */
pseudo_bit_t reserved3[0x00060];
/* -------------- */
-};
+};
/* Event_data Field - Completion Queue Error */
@@ -3036,7 +3036,7 @@ struct arbelprm_completion_queue_error_st { /* Little Endian */
/* -------------- */
pseudo_bit_t reserved3[0x00060];
/* -------------- */
-};
+};
/* Event_data Field - Completion Event */
@@ -3046,7 +3046,7 @@ struct arbelprm_completion_event_st { /* Little Endian */
/* -------------- */
pseudo_bit_t reserved1[0x000a0];
/* -------------- */
-};
+};
/* Event Queue Entry */
@@ -3065,7 +3065,7 @@ struct arbelprm_event_queue_entry_st { /* Little Endian */
1 HW */
pseudo_bit_t reserved3[0x00018];
/* -------------- */
-};
+};
/* QP/EE State Transitions Command Parameters */
@@ -3078,7 +3078,7 @@ struct arbelprm_qp_ee_state_transitions_st { /* Little Endian */
/* -------------- */
pseudo_bit_t reserved1[0x009c0];
/* -------------- */
-};
+};
/* Completion Queue Entry Format */
@@ -3131,7 +3131,7 @@ struct arbelprm_completion_queue_entry_st { /* Little Endian */
0xFE - For completion with error on Receive Queues
0xFF - For completion with error on Send Queues */
/* -------------- */
-};
+};
/* */
@@ -3152,7 +3152,7 @@ struct arbelprm_ecc_detect_event_data_st { /* Little Endian */
pseudo_bit_t err_ra[0x00010];
pseudo_bit_t err_ca[0x00010];
/* -------------- */
-};
+};
/* Event_data Field - ECC Detection Event */
@@ -3177,7 +3177,7 @@ struct arbelprm_scrubbing_event_st { /* Little Endian */
pseudo_bit_t err_ra[0x00010]; /* Error row address */
pseudo_bit_t err_ca[0x00010]; /* Error column address */
/* -------------- */
-};
+};
/* Miscellaneous Counters */
@@ -3186,28 +3186,28 @@ struct arbelprm_misc_counters_st { /* Little Endian */
/* -------------- */
pseudo_bit_t reserved0[0x007e0];
/* -------------- */
-};
+};
/* LAM_EN Output Parameter */
struct arbelprm_lam_en_out_param_st { /* Little Endian */
pseudo_bit_t reserved0[0x00040];
/* -------------- */
-};
+};
/* Extended_Completion_Queue_Entry */
struct arbelprm_extended_completion_queue_entry_st { /* Little Endian */
pseudo_bit_t reserved0[0x00020];
/* -------------- */
-};
+};
/* */
struct arbelprm_eq_cmd_doorbell_st { /* Little Endian */
pseudo_bit_t reserved0[0x00020];
/* -------------- */
-};
+};
/* 0 */
@@ -3456,5 +3456,5 @@ struct arbelprm_arbel_prm_st { /* Little Endian */
/* -------------- */
pseudo_bit_t reserved59[0xffcfc0];
/* -------------- */
-};
+};
#endif /* H_prefix_arbelprm_bits_fixnames_MT25218_PRM_csp_H */