From daaad2703d654a6452a0de60eaf319b020af386c Mon Sep 17 00:00:00 2001 From: jljusten Date: Sat, 19 Jun 2010 06:08:07 +0000 Subject: PcAtChipsetPkg PciHostBridgeDxe: Fix build warning with GCC Add default case to switch blocks to remove GCC compiler warning. The default case code path should never be taken. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10592 6f19259b-4bc3-4df7-8a09-765794883524 --- PcAtChipsetPkg/PciHostBridgeDxe/PciRootBridgeIo.c | 42 +++++++++++++++++++++++ 1 file changed, 42 insertions(+) (limited to 'PcAtChipsetPkg/PciHostBridgeDxe') diff --git a/PcAtChipsetPkg/PciHostBridgeDxe/PciRootBridgeIo.c b/PcAtChipsetPkg/PciHostBridgeDxe/PciRootBridgeIo.c index edbe4a0..a338365 100644 --- a/PcAtChipsetPkg/PciHostBridgeDxe/PciRootBridgeIo.c +++ b/PcAtChipsetPkg/PciHostBridgeDxe/PciRootBridgeIo.c @@ -914,6 +914,13 @@ RootBridgeIoMemRW ( case EfiPciWidthUint64: MmioWrite64 ((UINTN)Address, *((UINT64 *)Uint8Buffer)); break; + default: + // + // The RootBridgeIoCheckParameter call above will ensure that this + // path is not taken. + // + ASSERT (FALSE); + break; } } else { switch (OperationWidth) { @@ -929,6 +936,13 @@ RootBridgeIoMemRW ( case EfiPciWidthUint64: *((UINT64 *)Uint8Buffer) = MmioRead64 ((UINTN)Address); break; + default: + // + // The RootBridgeIoCheckParameter call above will ensure that this + // path is not taken. + // + ASSERT (FALSE); + break; } } } @@ -989,6 +1003,13 @@ RootBridgeIoIoRW ( case EfiPciWidthUint32: IoWrite32 ((UINTN)Address, *((UINT32 *)Uint8Buffer)); break; + default: + // + // The RootBridgeIoCheckParameter call above will ensure that this + // path is not taken. + // + ASSERT (FALSE); + break; } } else { switch (OperationWidth) { @@ -1001,6 +1022,13 @@ RootBridgeIoIoRW ( case EfiPciWidthUint32: *((UINT32 *)Uint8Buffer) = IoRead32 ((UINTN)Address); break; + default: + // + // The RootBridgeIoCheckParameter call above will ensure that this + // path is not taken. + // + ASSERT (FALSE); + break; } } } @@ -1074,6 +1102,13 @@ RootBridgeIoPciRW ( case EfiPciWidthUint32: PciWrite32 (PcieRegAddr, *((UINT32 *)Uint8Buffer)); break; + default: + // + // The RootBridgeIoCheckParameter call above will ensure that this + // path is not taken. + // + ASSERT (FALSE); + break; } } else { switch (OperationWidth) { @@ -1086,6 +1121,13 @@ RootBridgeIoPciRW ( case EfiPciWidthUint32: *((UINT32 *)Uint8Buffer) = PciRead32 (PcieRegAddr); break; + default: + // + // The RootBridgeIoCheckParameter call above will ensure that this + // path is not taken. + // + ASSERT (FALSE); + break; } } } -- cgit v1.1